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PACKAGE

+

GND

DIN

DIN -

GND

DOUT +

VCC

DOUT -

VCC

2

1

3

4

11

12

10

9

6

5

7

8

15

16

14

13

ONET

8501P

16 PinQFN

ONET8501P

SLLS885 – FEBRUARY 2008

The ONET8501P is available in a small footprint 3 mm

× 3 mm 16-pin RoHS compliant QFN package with a lead

pitch of 0,5 mm. The pin out is shown in Figure 2.

Figure 2. Pinout of ONET8501P in a 3mm

× 3mm 16-Pin QFN package (top view)

PIN DESCRIPTION

NO.

NAME

TYPE

DESCRIPTION

1,4, EP

GND

Supply

Circuit ground. Exposed die pad (EP) must be grounded.

2

DIN

+

Analog-input

Non-inverted data input. Differentially 100

Ω terminated to DIN–.

3

DIN–

Analog-input

Inverted data input. Differentially 100

Ω terminated to DIN+.

5

COC1

Analog

Offset cancellation filter capacitor plus terminal. An external capacitor can be connected

between this pin and COC2 to reduce the low frequency cutoff. To disable the offset

cancellation loop, connect COC1 and COC2 together.

6

COC2

Analog

Offset cancellation filter capacitor minus terminal. An external capacitor can be connected

between this pin and COC1 to reduce the low frequency cutoff. To disable the offset

cancellation loop, connect COC1 and COC2 together.

7

DIS

Digital-input

Disables the output stage when set to a high level.

8

LOS

Open drain MOS

High level indicates that the input signal amplitude is below the programmed threshold

level. Open drain output. Requires an external 10-k

Ω pull-up resistor to VCC for proper

operation.

9, 12

VCC

Supply

3.3-V ± 10% supply voltage.

10

DOUT–

CML-out

Inverted data output. On-chip 50

Ω back-terminated to VCC.

11

DOUT+

CML-out

Non-inverted data output. On-chip 50

Ω back-terminated to VCC.

13

RATE1

Digital-input

Bandwidth selection for noise suppression.

14

RATE0

Digital-input

Bandwidth selection for noise suppression.

15

SCK

Digital-input

Serial interface clock input. Connect a pull-up resistor (10 k

Ω typical) to VCC.

16

SDA

Digital-input

Serial interface data input. Connect a pull-up resistor (10 k

Ω typical) to VCC.

Copyright © 2008, Texas Instruments Incorporated

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