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AC ELECTRICAL CHARACTERISTICS

ONET8501P

SLLS885 – FEBRUARY 2008

Over recommended operating conditions, outputs connected to a 50-

Ω load, AMP1 = 0, AMP0 = 1 (Register 3) and maximum

bandwidth unless otherwise noted. Typical operating condition is at VCC = 3.3 V and TA = +25°C

PARAMETER

TEST CONDITION

MIN

TYP

MAX

UNIT

f3dB-H

High frequency -3dB bandwidth

8.5

12.0

GHz

f3dB-H

–3dB bandwidth default settings

RATE1 = 1, RATE0 = 0

11.0

GHz

RATE1 = 1, RATE0 = 1

6.5

RATE1 = 0, RATE0 = 1

4.0

RATE1 = 0, RATE0 = 0

2.2

f3dB-L

Low frequency –3dB bandwidth

With 330-pF COC capacitor

20

45

kHz

vIN,MIN

Data input sensitivity

6

9

mVpp

K28.5 pattern at 11.3 Gbps, BER < 10–12

VOD-min

≥ 0.95 * VOD (output limited)

8

20

5.5

K28.5 pattern at 8.5 Gbps, BER < 10–12, RATE1 = 1, RATE0 = 0

5

K28.5 pattern at 4.25 Gbps, BER < 10–12, RATE1 = 1, RATE0 = 1

5

K28.5 pattern at 2.125 Gbps, BER < 10–12, RATE1 = 0, RATE0 = 1

SDD11

Differential input return gain

0.01 GHz < f < 3.9 GHz

-16

dB

3.9 GHz < f < 12.1 GHz

See (1)

SDD22

Differential output return gain

0.01 GHz < f < 3.9 GHz

–16

dB

3.9 GHz < f < 12.1 GHz

See(1)

SCD11

Differential to common mode

0.01 GHz < f < 12.1 GHz

–40

dB

conversion gain

SCC22

Common mode output return gain

0.01 GHz < f < 7.5 GHz

–13

dB

7.5 GHz < f < 12.1 GHz

–9

A

Small signal gain

35

40

dB

vIN,MAX

Data input overload

2000

mVpp

DJ

Deterministic jitter at 11.3 Gbps

vIN = 5 mVpp, K28.5 pattern

5

10

pspp

vIN = 20 mVpp, K28.5 pattern

4

10

vIN = 2000 mVpp, K28.5 pattern

5

15

Deterministic jitter at 8.5 Gbps

vIN = 20 mVpp, K28.5 pattern, RATE1 = 1, RATE0 = 0

5

pspp

Deterministic jitter at 4.25 Gbps

vIN = 20 mVpp, K28.5 pattern, RATE1 = 1, RATE0 = 1

6

pspp

Deterministic jitter at 2.125 Gbps

vIN = 20 mVpp, K28.5 pattern, RATE1 = 0, RATE0 = 1

10

pspp

RJ

Random jitter

vIN = 20 mVpp

1

psrms

VOD

Differential data output voltage

vIN > 20 mVpp, DIS = 0, AMP1 = 0, AMP0 = 0

250

300

350

mVpp

vIN > 20 mVpp, DIS = 0, AMP1 = 0, AMP0 = 1

500

600

700

vIN > 20 mVpp, DIS = 0, AMP1 = 1, AMP0 = 1

700

900

1100

DIS = 1

5

mVrms

VPREEM

Output pre-emphasis step size

1

dB

tR

Output rise time

20% to 80%, vIN > 20mVpp

25

35

ps

tF

Output fall time

20% to 80%, vIN > 20mVpp

25

35

ps

VTH

LOW LOS assert threshold range

K28.5 pattern at 11.3 Gbps, LOSRNG = 0

15

mVpp

min

LOW LOS assert threshold range

K28.5 pattern at 11.3 Gbps, LOSRNG = 0

35

max

VTH

HIGH LOS assert threshold range

K28.5 pattern at 11.3 Gbps, LOSRNG = 1

35

mVpp

min

HIGH LOS assert threshold range

K28.5 pattern at 11.3 Gbps, LOSRNG = 1

80

max

LOS threshold variation

Versus temperature at 11.3 Gbps

1.5

dB

Versus supply voltage VCC at 11.3 Gbps

1

dB

Versus data rate

1.5

dB

LOS hysteresis (electrical)

K28.5 pattern at 11.3 Gbps

2

4

6

dB

TLOS_AST

LOS assert time

2.5

10

80

us

TLOS_DEA

LOS deassert time

2.5

10

80

us

(1)

Differential return gain given by SDD11, SDD22 = –11.6 + 13.33 log10(f/8.25), f expressed in GHz.

Copyright © 2008, Texas Instruments Incorporated

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