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Dead-Time Control and MOSFET Drivers

Overcurrent Protection

Thermal Shutdown

Power Good (PWRGD)

TPS54311-EP, TPS54312-EP,

TPS54313-EP, TPS54314-EP,

TPS54315-EP, TPS54316-EP

SGLS376A – FEBRUARY 2007 – REVISED MARCH 2007

Adaptive dead-time control prevents shoot-through current from flowing in both N-channel power MOSFETs

during the switching transitions by actively controlling the turn-on times of the MOSFET drivers. The high-side

driver does not turn on until the gate drive voltage to the low-side FET is below 2 V. The low-side driver does not

turn on until the voltage at the gate of the high-side MOSFETs is below 2 V. The high-side and low-side drivers

are designed with 300-mA source and sink capability to quickly drive the power MOSFETs gates. The low-side

driver is supplied from VIN, while the high-side drive is supplied from the BOOT pin. A bootstrap circuit uses an

external BOOT capacitor and an internal 2.5-

Ω bootstrap switch connected between the VIN and BOOT pins.

The integrated bootstrap switch improves drive efficiency and reduces external component count.

The cycle by cycle current limiting is achieved by sensing the current flowing through the high-side MOSFET

and differential amplifier and comparing it to the preset overcurrent threshold. The high-side MOSFET is turned

off within 200 ns of reaching the current limit threshold. A 100-ns leading edge blanking circuit prevents false

tripping of the current limit. Current limit detection occurs only when current flows from VIN to PH when sourcing

current to the output filter. Load protection during current sink operation is provided by thermal shutdown.

The device uses the thermal shutdown to turn off the power MOSFETs and disable the controller if the junction

temperature exceeds 150

°C. The device is released from shutdown when the junction temperature decreases to

10

°C below the thermal shutdown trip point and starts up under control of the slow-start circuit. Thermal

shutdown provides protection when an overload condition is sustained for several milliseconds. With a persistent

fault condition, the device cycles continuously; starting up by control of the soft-start circuit, heating up due to

the fault, and then shutting down upon reaching the thermal shutdown point.

The power good circuit monitors for under voltage conditions on VSENSE. If the voltage on VSENSE is 10%

below the reference voltage, the open-drain PWRGD output is pulled low. PWRGD is also pulled low if VIN is

less than the UVLO threshold, or SS/ENA is low, or thermal shutdown is asserted. When VIN = UVLO threshold,

SS/ENA = enable threshold, and VSENSE > 90% of Vref, the open drain output of the PWRGD pin is high. A

hysteresis voltage equal to 3% of Vref and a 35-µs falling edge deglitch circuit prevent tripping of the power good

comparator due to high frequency noise.

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