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STM32U073RCT6 Datasheet(PDF) 14 Page - STMicroelectronics |
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STM32U073RCT6 Datasheet(HTML) 14 Page - STMicroelectronics |
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14 / 146 page ![]() Peripheral Run Sleep Low- power run Low- power sleep Stop 0/1 Stop 2 Standby Shutdown VBAT - - - - LPTIMx (x = 1 to 3) O O O O O O O O - - - - - Independent watchdog (IWDG) O O O O O O O O O O - - - Window watchdog (WWDG) O O O O - - - - - - - - - SysTick timer O O O O - - - - - - - - - Touch sensing controller (TSC) O O O O - - - - - - - - - LCD O O O O O O O O - - - - - True random number generator (RNG) O(7) O(7) - - - - - - - - - - - CRC calculation unit O O O O - - - - - - - - - GPIOs O O O O O O O O (8) 5 pins(9) (10) 5 pins(9) - 1. The flash memory can be configured in power-down mode. By default, it is not in power-down mode. 2. The SRAM clock can be gated on or off. 3. SRAM2 content is preserved when the bit RRS is set in PWR_CR3 register. 4. Some peripherals with wake-up from Stop capability can request HSI16 to be enabled. In this case, HSI16 is woken up by the peripheral, and only feeds the peripheral which requested it. HSI16 is automatically put off when the peripheral does not need it anymore. 5. UART and LPUART reception is functional in Stop mode, and generates a wake-up interrupt on Start, address match or received frame event. 6. I2C address detection is functional in Stop mode, and generates a wake-up interrupt in case of address match. 7. Voltage scaling Range 1 only. 8. I/Os can be configured with internal pull-up, pull-down or floating in Standby mode. 9. The I/Os with wake-up from Standby/Shutdown capability are PA0, PA1, PA2, PB15, PC5, and PC13. 10. I/Os can be configured with internal pull-up, pull-down or floating in Shutdown mode but the configuration is lost when exiting the Shutdown mode. 3.8 Peripheral interconnect matrix Several peripherals have direct connections between them. This allows autonomous communication between peripherals, saving CPU resources thus power supply consumption. In addition, these hardware connections allow fast and predictable latency. Depending on peripherals, these interconnections can operate in Run, Sleep and Stop modes. STM32U073x8/B/C Functional overview DS14548 - Rev 2 page 14/146 |
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