BQ7693003DBT datasheet(30/68 Pages) TI2

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Name

Addr

TS2_LO(1)

0x2F

<7:0>

TS3_HI(2)

0x30

RSVD

<13:8>

TS3_LO(2)

0x31

<7:0>

CC_HI

0x32

<15:8>

CC_LO

0x33

<7:0>

ADCGAIN1

0x50

RSVD

ADCGAIN<4:3>

RSVD

ADCOFFSET

0x51

ADCOFFSET<7:0>

ADCGAIN2

0x59

ADCGAIN<2:0>

RSVD

(1)

These registers are only valid for BQ76930 and BQ76940.

(2)

These registers are only valid for BQ76940.

8.5.1 Register Details

Table 8-3. SYS_STAT (0x00)

BIT

NAME

CC_READY

RSVD

DEVICE_

XREADY

OVRD_

ALERT

SCD

OCD

RESET

ACCESS

Note

Bits in SYS_STAT may be cleared by writing a "1" to the corresponding bit.

Writing a "0" does not change the state of the corresponding bit.

CC_READY (Bit 7): Indicates that a fresh coulomb counter reading is available. Note that if this bit is not cleared between two adjacent CC

readings becoming available, the bit remains latched to 1. This bit may only be cleared (and not set) by the host.

0 = Fresh CC reading not yet available or bit is cleared by host microcontroller.

1 = Fresh CC reading is available. Remains latched high until cleared by host.

RSVD (Bit 6): Reserved. Do not use.

DEVICE_XREADY (Bit 5): Internal chip fault indicator. When this bit is set to 1, it should be cleared by the host. May be set due to

excessive system transients. This bit may only be cleared (and not set) by the host.

0 = Device is OK.

1 =

Internal chip fault detected, recommend that host microcontroller clear this bit after waiting a few seconds. Remains latched

high until cleared by the host.

OVRD_ALERT (Bit 4): External pull-up on the ALERT pin indicator. Only active when ALERT pin is not already being driven high by the

AFE itself.

0 = No external override detected

1 = External override detected. Remains latched high until cleared by the host.

UV (Bit 3): Undervoltage fault event indicator.

0 = No UV fault is detected.

1 = UV fault is detected. Remains latched high until cleared by the host.

OV (Bit 2): Overvoltage fault event indicator.

0 = No OV fault is detected.

1 = OV fault is detected. Remains latched high until cleared by the host.

SCD (Bit 1): Short circuit in discharge fault event indicator.

0 = No SCD fault is detected.

1 = SCD fault is detected. Remains latched high until cleared by the host.

OCD (Bit 0): Over current in discharge fault event indicator.

BQ76920, BQ76930, BQ76940

SLUSBK2I – OCTOBER 2013 – REVISED MARCH 2022

www.ti.com

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Product Folder Links: BQ76920 BQ76930 BQ76940

BQ7693003DBT Datasheet(PDF) 30 Page - Texas Instruments

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