| Electronic Components Datasheet Search |
|
L9001 Datasheet(PDF) 16 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
L9001 Datasheet(HTML) 16 Page - STMicroelectronics |
|
16 / 38 page ![]() Power supply L9001 16/38 DS12089 Rev 2 5.3 VDD2 regulator The device integrates a second configurable BUCK/LDO regulator VDD2, whose output voltage can be adjusted between 0.8 V and 5 V and so it can be adapted to supply uC core voltage. The BUCK/LDO mode can be selected through CONF2 pin as described in Section 5.1; the current capability depends on the chosen option and is specified in Table 10. The output voltage can be adjusted by adequately sizing the external divider in order to have the specified feedback reference voltage on the FB2 input pin. The input voltage of VDD2 regulator is VR1 and this input can be connected to: VS supply voltage, in a configuration in which VDD2 is directly supplied from battery; VDD1 output, in a configuration in which VDD2 is supplied by VDD1 pre regulator. The connection of VR1 to VS battery will automatically disable VDD1 (as explained in the previous section) as the device does not allow the independent operation of VDD1 and VDD2 both supplied from battery. As a consequence, when both regulators are operating, the external load applicable on VDD1 is 1 A reduced by the input current of VDD2 regulator. When VDD2 regulator input is connected to VS supply, the output voltage in buck mode cannot reach voltages lower than 2.5 V, whereas there are no limitations in LDO mode. The output voltage of VDD2 regulator (which is generated by the buck or directly V20 in case of LDO mode) can be directly used by external loads and must be connected also to pin VR2. In fact VR2 is the output of a LDO bypass regulator which is used to keep regulation active when output current demand decreases below a specified threshold ILIM_BP2 (bypass mode). In this bypass mode, the reference feedback voltage FB2 is regulated according to the FB2_byp parameter. Such mode is used for example when the system needs to reduce the overall consumption by entering the Low Power mode (see dedicated Section 8.2.4 for details) To guarantee full flexibility in the system power supply architecture, VDD2 regulator can also be disabled, if application does not require it. This can be done by shorting the FB2 output pin to VS. Lout1 Inductor at VR1 Application info - 22 - μH ESR_Cout1 Eq. series resistance for Cout1 Application info - - 50 mΩ Cvs1 VS bypass capacitor Application info - 100 - nF Cvs2 - 4.7 - μF 1. For further load/line transient details, please refer to AN5163. Table 9. VDD1 regulator parameters (continued) Symbol Parameter Test condition Min. Typ. Max. Unit |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |