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L99MH98 Datasheet(PDF) 56 Page - STMicroelectronics |
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L99MH98 Datasheet(HTML) 56 Page - STMicroelectronics |
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56 / 147 page ![]() • Frame n+1 – SDI: ◦ Bit 23 = 0 or 1 (read or write command on the OpCode) ◦ Bit 22 = Not used ◦ Bits 21 to 16 = Address of the register to read or write ◦ Bits 15 to 1 = Data to write (if write command was chosen) or all ‘0’ (if read command was chosen) ◦ Bit 0 = Parity bit – SDO: ◦ Bit 23 = 0 (no SPI error or RESET in the previous access) ◦ Bit 22 = GSBN bit (0 = Fault) ◦ Bits 21 to 16 = Address of the register selected in the previous frame (n) ◦ Bits 15 to 1 = Data value of the register selected in the previous frame (n) ◦ Bit 0 = Parity bit Figure 39. Access while an internal fault happens scenario Frame n Read or Write cmd Address of the register to read reg1 Status register bit15, bit14 and bit1 are set to ‘0’ no fault, no reset Data field Internal device fault happens Frame n+1 SPI Error or RESET 0 means: No SPI error in previous access (frame n-1) No reset before this access GSBN: 0 means fault is present at CS falling edge of frame n+1 Address reg1, selected by SDI during previous frame (n) Data value of reg1 (selected by SDI during previous frame (n)) saved at frame n+1 cs falling new command Address reg2 Data to write into reg2 L99MH98 Serial peripheral interface (SPI) DS14611 - Rev 3 page 56/147 |
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