© 2002 Fairchild Semiconductor Corporation

www.fairchildsemi.com

LMV321 / LMV358 / LMV324 Rev. 2.10

5

Electrical Specifications (Continued)

TC = 25°C, VS = +5 V, G = 2, RL = 10 kΩ to VS/2, Rf = 10 kΩ, VO(DC) = VCC/2, unless otherwise noted.

Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality

levels are determined from tested parameters.

Notes:

3. Guaranteed by testing or statistical analysis at +25

°C.

4. +IN and -IN are gates to CMOS transistors with typical input bias current of <1 nA. CMOS leakage is too small to

practically measure.

Parameter

Conditions

Min.

Typ.

Max.

Unit

AC Performance

Gain Bandwidth Product

CL= 50 pF, RL= 2 kΩ to VS/2

1.4

MHz

Phase Margin

73

deg

Gain Margin

12

dB

Slew Rate

1.5

V/

μs

Input Voltage Noise

>50 kHz

33

nV/

√Hz

Crosstalk

LMV358

100 kHz

91

dB

LMV324

100 kHz

80

dB

DC Performance

Input Offset Voltage(3)

17

mV

Average Drift

6

μV/°C

Input Bias Current(4)

<1

nA

Input Offset Current(4)

<1

nA

Power Supply Rejection Ratio(3)

DC

50

65

dB

Open Loop Gain(3)

50

70

dB

Supply Current (Per Channel)(3)

100

150

μA

Input Characteristics

Input Common Mode Voltage Range(3)

LO

0

-0.4

V

HI

3.8

3.6

V

Common Mode Rejection Ratio(3)

50

75

dB

Output Characteristics

Output Voltage Swing

RL= 2 kΩ to VS/2; LO/HI

0.036 to

4.950

V

RL= 10 kΩ to VS/2; LO

(3)

0.013

0.100

V

RL= 10 kΩ to VS/2; HI

(3)

4.90

4.98

V

Short Circuit Output Current(3)

Sourcing; VO = 0 V

5

+34

mA

Sinking; VO = 5 V

10

-23

mA