APEX20KC datasheet(30/90 Pages) ALTERA

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APEX20KC Datasheet(PDF) 30 Page - Altera Corporation

30 / 90 page

Altera Corporation

APEX 20KC Programmable Logic Device Data Sheet

Figure 18. Deep Memory Block Implemented with Multiple ESBs

The ESB implements two forms of dual-port memory: read/write clock

mode and input/output clock mode. The ESB can also be used for

bidirectional, dual-port memory applications in which two ports read or

write simultaneously. To implement this type of dual-port memory, two

ESBs are used to support two simultaneous reads or writes.

The ESB can also use Altera megafunctions to implement dual-port RAM

applications where both ports can read or write, as shown in Figure 19.

Figure 19. APEX 20KC ESB Implementing Dual-Port RAM

ESB

to System Logic

Address Decoder

Port A

Port B

address_a[]

address_b[]

data_a[]

data_b[]

we_a

we_b

clkena_a

clkena_b

Clock A

Clock B

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