DIA1412

Version 1.0, Jul 2024

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© 2024 DIOO MICROCIRCUITS CO., LTD.

21

20h

R/W

Internal Therm

Limit

128

64

32

16

8

4

2

1

55h

(85°C)

21h

R/W

Therm

Hysteresis

128

64

32

16

8

4

2

1

0Ah

(10°C)

Note: R = Read. W = Write.

12.9. External fault register

The external fault register is used to store the detected fault event of the external channels. When it is read, this

register is cleared.

Addr. Type Register

B7

B6

B5

B4

B3

B2

B1

B0

Default

1Bh

R-C

External

fault

Reserved

EFLT

Reserved

00h

Note: R-C = Read then Clear.

Bit

Name

Description

7:2

Reserved

Do not use.

1

EFLT

This bit will be set if the external channel is detected a fault.

0

Reserved

Do not use.

12.10. Channel mask register

The channel mask register is used to determine whether the individual channel is masked or not. When a

channel is masked, the

_____

ALERT pin will not be asserted even when the masked channel detects a fault or out of

limit error. No matter the channel mask bit is set or not, the status registers will be updated normally.

Addr. Type

Register

B7

B6

B5

B4

B3

B2

B1

B0

Default

1Fh

R/W

Channel mask

Reserved

EMASK

INTMASK

00h

Note: R = Read. W = Write.

Bit

Name

Value

Description

7:2

Reserved

-

Do not use.

1

EMASK

0 (default)

The external channel mask is disabled.

1

The external channel mask is enabled.

0

INTMASK

0 (default)

The internal channel mask is disabled.

1

The internal channel mask is enabled.