DIA1412

Version 1.0, Jul 2024

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22

12.11. Consecutive ALERT register

The consecutive ALERT register is used to choose how many times an out-of-limit (≥ High Limit or < Low Limit)

condition or fault condition have been detected in consecutive measurements before the

_____

ALERT or

______

THERM /ADDR pin is asserted. Additionally, the TIMEOUT bit (B7) is used to enable or disable the SMBus

timeout.

When an out-of-limit condition or fault condition is detected on the same temperature channel in consecutive

measurements, the consecutive alert counter for that channel will be increased by 1. Each counter will be reset if

no out-of-limit condition or fault condition occurs in a consecutive measurement.

When the

_____

ALERT pin is configured in the interrupt mode, if any consecutive alert counter reaches its

programmed value, the STATUS bit for the corresponding channel and the last out-of-limit condition or fault

condition will be set to ‘1’. And the

_____

ALERT pin will be asserted. Then the consecutive alert counter will be

cleared.

When the

_____

ALERT pin is configured in comparator mode, the consecutive alert counter will be increased by 1

only when the measured temperature exceeds the High Limit. Once the consecutive alert counter reaches the

programmed limit, the

_____

ALERT pin will be asserted. However, the consecutive alert counter will not be reset. And

it will remain set until the temperature drops below the High Limit minus the Therm Hysteresis.

Addr. Type

Register

B7

B6

B5

B4

B3

B2

B1

B0

Default

22h

R/W

Consecutive

ALERT

TIME

OUT

CTHRM [2:0]

CALRT [2:0]

Reserved

70h

Note: R = Read. W = Write.

Bit

Name

Description

7

TIMEOUT

0 (default): The SMBus Timeout function is disabled. The device will not resetting its SMBus protocol even

the SMCLK line being held low indefinitely.

1: The SMBus Timeout function is enabled. The device will reset the SMBus protocol if the SMCLK line is

held low for more than 30 ms.

6:4

CTHRM

[2:0]

Determines the number of consecutive temperature measurements that must exceed the corresponding

Therm Limit before the

______

THERM/ADDR pin is asserted. Every temperature channel uses the same value

for their therm counters. The consecutive therm counter will be increased by 1 whenever any temperature

measurement exceed the Therm Limit.

Once any channel’s measured temperature drops below the Therm Limit, the corresponding therm

counter is reset.

Once the

______

THERM/ADDR pin has been asserted, the therm counter will not reset until the corresponding

channel’s measured temperature drops below the Therm Limit minus the Therm Hysteresis.

The consecutive alert bits CTHRM[2:0] are decoded as shown in the following table. The default setting is

4 consecutive out of limit measurements.

3:1

CALRT

[2:0]

Determines the number of consecutive temperature measurements that must meet an out of limit

condition or fault condition before the

———

ALERT pin is asserted. Every temperature channel uses the same

for their alert counters. The consecutive alert bits CALRT[2:0] are decoded as shown in the following

table. The default setting is 1 consecutive out of limit measurements.

0

Reserved

Do not use.