ES9039Q2M datasheet(5/107 Pages) ESS

5 / 107 page

VERSION 0.2.2

ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 • WWW.ESSTECH.COM

ES9039Q2M Product Datasheet

List of Figures

Figure 1 - Functional Block Diagram........................................................................................................................................ 8

Figure 2 - ES9039Q2M Pinout................................................................................................................................................. 9

Figure 3 - Hardware Mode Pin Configurations....................................................................................................................... 13

Figure 4 - Hardware Mode Startup Sequence ....................................................................................................................... 16

Figure 5 - Digital Signal Path ................................................................................................................................................. 17

Figure 6 - THD Compensation Block Diagram....................................................................................................................... 19

Figure 7 - LJ & I²S Input for 16bit and 32bit Word Depths ..................................................................................................... 25

Figure 8 - TDM128 Mode....................................................................................................................................................... 26

Figure 9 - TDM256 Mode....................................................................................................................................................... 26

Figure 10 - TDM512 Mode..................................................................................................................................................... 26

Figure 11 - TDM1024 Mode................................................................................................................................................... 26

Figure 12 - TDM Connection of Several ES9039Q2M Devices in Parallel............................................................................. 27

Figure 13 - TDM Connection of Several ES9039Q2M Devices in Daisy Chain Mode ........................................................... 28

Figure 14 - DSD Format, 1-bit Stream ................................................................................................................................... 29

Figure 15 - Minimum Phase 64FS Frequency Response ...................................................................................................... 46

Figure 16 - Minimum Phase 64FS Impulse Response........................................................................................................... 46

Figure 17 - GPIO8 Digital I/O with Calibration Resistor ......................................................................................................... 47

Figure 18 – Recommended Power Up Sequence.................................................................................................................. 49

Figure 19 – Recommended Power Down Sequence ............................................................................................................. 49

Figure 18 - I²C Slave Control Interface Timing....................................................................................................................... 53

Figure 19 - I²C Single Byte Examples of Read and Write Instructions................................................................................... 53

Figure 20 - SPI Single Byte Write .......................................................................................................................................... 54

Figure 21 - SPI Single Byte Read.......................................................................................................................................... 54

Figure 22 - SPI Multi-Byte Read ............................................................................................................................................ 54

Figure 23 - Audio Interface Timing......................................................................................................................................... 55

Figure 24 - Typical ES9039Q2M Software Mode Application Diagram.................................................................................. 95

Figure 25 - Hardware (HW) Mode Reference Schematic for ES9039Q2M............................................................................ 96

Figure 26 - Software Mode Reference Schematic for ES9039Q2M....................................................................................... 97

Figure 27 - Output Stage Schematic for ES9039Q2M ........................................................................................................... 98

Figure 28 - ES9039Q2M Power Supply Schematic ............................................................................................................... 99

Figure 29 - ES9039Q2M 32 QFN Package Dimensions...................................................................................................... 102

Figure 30 - ES9039Q2M Marking ........................................................................................................................................ 103

Figure 31 - IR/Convection Reflow Profile (IPC/JEDEC J-STD-020D.1) ............................................................................... 104

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