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M58LW064 Datasheet(PDF) 26 Page - STMicroelectronics

Part # M58LW064
Description  64 Mbit x16 and x16/x32, Block Erase Low Voltage Flash Memories
PDF  53 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M58LW064 Datasheet(HTML) 26 Page - STMicroelectronics

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M58LW064A, M58LW064B
26/53
Table 18. Block Status Register (see also, Table 6 and 7 in the datasheet)
Note: 1. BA specifies the block address location, i-e, A22-A17.
2. Not Supported.
Table 19. Extended Query information
Note: 1. Bit7 to bit4 are coded in Hexadecimal and scaled in Volt while bit3 to bit0 are in Binary Code Decimal and scaled in mV.
2. Not supported.
Address
A22-A2
Data (Hex) x32 organization
Selected Block Information
(BA+3)h(1)
bit0
0
Block Unlocked
1
Block Locked
bit1
0
Last erase operation ended successfully (2)
1
Last erase operation not ended successfully (2)
bit7-2
0
Reserved for future features
M58LW064B - x32
M58LW064A - x16
M58LW064B -
x16 organization
Instruction
Address
offset
Address
A22-A2
Data (Hex)
x32 organization
Address
A22-A1
Data
(P)h
31h
50h
”P”
62h, 63h
50h
Query ASCII string - Extended Table
(P+1)h
32h
52h
”R”
64h, 65h
52h
(P+2)h
33h
49h
”Y”
66h, 67h
49h
(P+3)h
34h
31h
68h, 69h
31h
Major version number
(P+4)h
35h
31h
6Ah, 6Bh
31h
Minor version number
(P+5)h
36h
0Eh
6Ch, 6Dh
0Eh
Optional Feature: (1=yes, 0=no)
bit0, Chip Erase Supported (0=no)
bit1, Suspend Erase Supported (1=yes)
bit2, Suspend Program Supported (1=yes)
bit3, Lock/Unlock Supported (1=yes)
bit4, Queue Erase Supported (0=no)
Bit 31-5 reserved for future use
(P+6)h
37h
00h
6Eh, 6Fh
00h
Optional Features
(P+7)h
38h
00h
70h, 71h
00h
(P+8)h
39h
00h
72h, 73h
00h
(P+9)h
3Ah
01h
74h, 75h
00h
Function allowed after Suspend:
Program allowed after Erase Suspend (1=yes)
Bit 7-1 reserved for future use
(P+A)h
3Bh
00h (2)
76h, 77h
00h (2)
Block Status Register Mask
(P+C)h
3Ch
33h
78h, 79h
33h
VCC OPTIMUM Program/Erase voltage conditions
(P+D)h
3Dh
50h
7Ah, 7Bh
50h
VPP OPTIMUM Program/Erase voltage conditions
(P+E)h
3Eh
00h
7Ch, 7Dh
00h
Reserved for future use
(P+F)h
3Fh
00h
7Dh, 7Fh
00h
Reserved for future use



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