TMS320DM642GDKA500 datasheet(55/176 Pages) TI

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3.1.2

Device Configuration at Device Reset

TMS320DM642

Video/Imaging Fixed-Point Digital Signal Processor

SPRS200L – JULY 2002 – REVISED JANUARY 2007

Table 3-2. HPI vs. EMAC Peripheral Pin Selection

CONFIGURATION SELECTION

PERIPHERALS SELECTED

GP0[0] (Pin [M5])(1)

HD5 (Pin [Y1])

MAC_EN (Pin [C5])

HD[15:0]

HD[31:16]

HPI16

Hi-Z

HPI16

used for EMAC

HPI32 (HD[31:0])

Hi-Z

used for EMAC

(1) Invalid configuration. The GP0[0] pin must remain low during

device reset.

Table 3-3 describes the DM642 device configuration pins, which are set up via external pullup/pulldown

resistors through the specified EMIFA address bus pins (AEA[22:19]), and the TOUT1/LENDIAN,

GP0[3]/PCIEEAI, and the HD5 pins (all of which are latched during device reset).

Table 3-3. DM642 Device Configuration Pins (TOUT1/LENDIAN, AEA[22:19], GP0[3]/PCIEEAI,

VDAC/GP0[8]/PCI66, HD5/AD5, PCI_EN, and MAC_EN)

CONFIGURATION

NO.

FUNCTIONAL DESCRIPTION

Device Endian mode (LEND)

TOUT1/LENDIAN

0 - System operates in Big Endian mode

1 - System operates in Little Endian mode (default)

Bootmode [1:0]

00 - No boot (default mode)

[U23,

AEA[22:21]

01 - HPI/PCI boot (based on PCI_EN pin)

V24]

10 - Reserved

11 - EMIFA boot

EMIFA input clock select

Clock mode select for EMIFA (AECLKIN_SEL[1:0])

[V25,

00 - AECLKIN (default mode)

AEA[20:19]

V26]

01 - CPU/4 Clock Rate

10 - CPU/6 Clock Rate

11 - Reserved

PCI EEPROM Auto-Initialization (PCIEEAI)

PCI auto-initialization via external EEPROM

0 - PCI auto-initialization through EEPROM is disabled; the PCI peripheral uses the specified PCI

GP0[3]/PCIEEAI

default values (default).

1 - PCI auto-initialization through EEPROM is enabled; the PCI peripheral is configured through

EEPROM provided the PCI peripheral pin is enabled (PCI_EN = 1).

PCI frequency selection (PCI66) [PCI peripheral needs be enabled (PCI_EN = 1) to use this function]

Selects the PCI operating frequency of 66 MHz or 33 MHz PCI operating frequency is selected at reset

via the pullup/pulldown resistor on the PCI66 pin:

0 - PCI operates at 66 MHz (default).

VDAC/GP0[8]/PCI66

AD1

1 - PCI operates at 33 MHz.

The -500 speed device supports PCI at 33 MHz only. For proper -500 device operation when the PCI is

enabled (PCI_EN = 1), this pin must be pulled up with a 1-k

Ω resistor at device reset.

Note: If the PCI peripheral is disabled (PCI_EN pin = 0), this pin must not be pulled up.

HPI peripheral bus width (HPI_WIDTH)

0 - HPI operates as an HPI16.

(HPI bus is 16 bits wide. HD[15:0] pins are used and the remaining HD[31:16] pins are reserved pins in

HD5/AD5

the Hi-Z state.)

1 - HPI operates as an HPI32.

(HPI bus is 32 bits wide. All HD[31:0] pins are used for host-port operations.)

(Also see the PCI_EN; TOUT0/MAC_EN functional description in this table)

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