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TAS2020 Datasheet(PDF) 65 Page - Texas Instruments |
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TAS2020 Datasheet(HTML) 65 Page - Texas Instruments |
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65 / 79 page ![]() 7.8 PAGE 8 Registers Table 7-92 lists the memory-mapped registers for the PAGE 8 registers. All register offset addresses not listed in Table 7-92 should be considered as reserved locations and the register contents should not be modified. Table 7-92. PAGE 8 Registers Address Acronym Description Section 0h PAGE Device Page Section 7.8.1 8h DEV_PERF_TUNING_08 Device performance tuning Section 7.8.2 Ch DEV_PERF_TUNING_09 Device performance tuning Section 7.8.3 10h DEV_PERF_TUNING_10 Device performance tuning Section 7.8.4 14h DEV_PERF_TUNING_06 Device performance tuning Section 7.8.5 7.8.1 PAGE Register (Address = 0h) [Reset = 00h] Return to the Summary Table. The devices memory map is divided into pages and books. This register sets the page. Table 7-93. PAGE Register Field Descriptions Bit Field Type Reset Description 7-0 PAGE[7:0] R/W 0h Sets the device page. 0h = Page 0 1h = Page 1 FFh = Page 255 7.8.2 DEV_PERF_TUNING_08 Register (Address = 8h) [Reset = 002D0Eh] Return to the Summary Table. Device performance tuning Table 7-94. DEV_PERF_TUNING_08 Register Field Descriptions Bit Field Type Reset Description 23-0 DEV_PERF_TUNING_08[ 23:0] R/W 2D0Eh Addresses 0x8 to 0xA are combined. Can be configured using the PPC3 Software. 7.8.3 DEV_PERF_TUNING_09 Register (Address = Ch) [Reset = F8CCCDh] Return to the Summary Table. Device performance tuning Table 7-95. DEV_PERF_TUNING_09 Register Field Descriptions Bit Field Type Reset Description 23-0 DEV_PERF_TUNING_09[ 23:0] R/W F8CCCDh Addresses 0xC to 0xE are combined. Can be configured using the PPC3 Software. 7.8.4 DEV_PERF_TUNING_10 Register (Address = 10h) [Reset = 009AC0h] Return to the Summary Table. Device performance tuning www.ti.com TAS2020 SLASFD4A – AUGUST 2024 – REVISED JULY 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 65 Product Folder Links: TAS2020 |
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