RZSLASHA1M datasheet(60/137 Pages) RENESAS

60 / 137 page

R01DS0479EJ0100 Rev.1.00

Page 60 of 137

Dec. 25, 2024

RZ/A1H Group, RZ/A1M Group

3. Electrical Characteristics

Note 1. Reference value. The accuracy of the clock signal affects the quality of images output by the digital video decoder. Input clock

signals that are as accurate as is possible.

Note 2. Settings for values smaller than the above specifications may be possible, as long as the values are confirmed through

evaluation by the manufacturer of the oscillator.

Figure 3.2

EXTAL, AUDIO_X1, AUDIO_CLK, USB_X1, and VIDEO_X1 Clock Input Timing

Figure 3.3

(1) CKIO Clock Output Timing 1

Figure 3.3

(2) CKIO Clock Output Timing 2

On-chip PLL circuit oscillation settling time

tPOSC

―

Figure 3.4 and

Figure 3.6 (1)

On-chip oscillation circuit oscillation settling time

(RTC_X1)

tROSC

―3*2

Figure 3.7

On-chip oscillation circuit oscillation settling time

(RTC_X3)

―10*2

Figure 3.7

On-chip oscillation circuit oscillation settling time (other

than above)

―4*2

Figure 3.4,

Figure 3.6 (1), and

Figure 3.7

Mode hold time

tMDH

200

―

Figure 3.4 and

Figure 3.6 (1)

SSCG Stabilizing Time

tSSCG

―

Figure 3.5

Table 3.5

Clock Timing

Item

Symbol

Min.

Max.

Unit

Figure

EXH

EXf

tEXr

EXL

EXcyc

VIH

1/2 PVcc

VIL

EXTAL,

AUDIO_X1,

AUDIO_CLK,

USB_X1*

(input)

Note: * When the clock is input on the EXTAL, AUDIO_X1, AUDIO_CLK, USB_X1, or VIDEO_X1

cyc

CKOL1

CKOH1

VOH

1/2 PVcc

CKOr1

CKOf1

VOH

VOL

VOH

cyc

CKOL2

CKOH2

2.0V

1/2 PVcc

CKOr2

CKOf2

2.0V

0.8V0.8V

2.0V

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