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CS5543 Datasheet(PDF) 28 Page - Cirrus Logic |
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CS5543 Datasheet(HTML) 28 Page - Cirrus Logic |
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28 / 30 page ![]() CS5542 CS5543 28 DS109PP2 CS5543 PIN DESCRIPTIONS DMODE[2:0] - Digital Mode Select (Inputs), Pins 29, 30, 31. Selects the operation mode of the CS5543. DATSEL[3:0] - Data Selection Mode (Inputs), Pins 32, 33, 34, 35. Selects the Data to be placed on the DATAOUT[3:0] pins. RST - Chip Reset (Input), Pin 26 Resets all internal logic and registers. DSD-System Interface Pins DATACLK - Serial Data Clock (Input), Pin 38. Clock signal generated by the system controller which governs all serial output data timing from the CS5543. CLKIN - Master System Clock (Input), Pin 36. A CMOS compatible clock input to this pin governs all non-serial data timing. FRAME - Framing Signal (Input), Pin 37. Synchronizes DATACLK and MCLK for each frame of output data from the CS5543. DATAOUT[3:0] - Serial Output Data (Outputs), Pins 41-44. CS5543 serial output data. DATAIN[3:0] - Serial Data Inputs (Inputs), Pins 1-4. CS5543 serial input data from the serial output of the adjacent CS5543 in a multi-decimator system. |
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