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TMS320VC5509 Datasheet(PDF) 87 Page - Texas Instruments |
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TMS320VC5509 Datasheet(HTML) 87 Page - Texas Instruments |
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87 / 124 page  Electrical Specifications 87 April 2001 − Revised January 2008 SPRS163H WRITE WRITE WRITE M22 M24 M26 M30 M34 M28 M32 M25 M27 M31 M23 M35 M29 M33 BE1 BE2 BE3 CA1 CA2 CA3 D1 D2 D3 CLKMEM CEx† BEx‡ EMIF.A[13:0] D[15:0] SDA10 SDRAS SDCAS SDWE † The chip enable that becomes active depends on the address being accessed. ‡ All BE[1:0] signals are driven low (active) during reads. Byte manipulation of the read data is performed inside the EMIF. These signals remain active until the next access that is not an SDRAM read occurs. Figure 5−9. Three SDRAM WRT Commands |
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