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RMS132AW Datasheet(PDF) 19 Page - Emerging Memory & Logic Solutions Inc |
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RMS132AW Datasheet(HTML) 19 Page - Emerging Memory & Logic Solutions Inc |
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19 / 26 page ![]() Advance Information The specifications of this device are subject to change without notice. For latest documentation see http://www.emlsi.com. 19 RMS132AW Table8: Absolute Maximum Rating 0 ~ 70 Ambient Temperature (Commercial) 1 50 -1.0 ~ 4.6 -1.0 ~ 4.6 -55 ~ 150 -25 ~ 85 Rating W P D Power Dissipation mA I OS Short Circuit Output Current V VDD, VDDQ Voltage on VDD relative to VSS V V IN, VOUT Voltage on Any Pin relative to VSS °C T STG Storage Temperature °C T A Ambient Temperature (Industrial) Unit Symbol Parameter Note : Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Table9: Capacitance (TA=25 °C, f=1MHz, VDD=3.0V or 3.3V) DQ0~DQ31 A0~A10, BA, CKE, /CS, /RAS, /CAS, /WE, DQM0~DQM3 CLK Pin 3 2 2 Min 5 4 4 Max pF C IO Data Input/Output Capacitance pF C I2 pF C I1 Input Capacitance Unit Symbol Parameter Table10: DC Operating Condition (Voltage referenced to VSS=0V, TA= -25 ~ 85 °C) V 3.6 3.0 2.7 VDD I OL= +0.1mA V 0.4 - - V OL Output Low Voltage 4 uA 1 - -1 I LI Input Leakage Current 2 V VDDQ+0.3 - 2.2 V IH Input High Voltage 3 V 0.5 0 -0.3 V IL Input Low Voltage I OH= -0.1mA V - - 2.4 V OH Output High Voltage uA V Unit 3.0 Typ -1.5 2.7 Min 1.5 3.6 Max 5 I LO Output Leakage Current 1 VDDQ Power Supply Voltage Note Symbol Parameter Note : 1. VDDQ must not exceed the level of VDD 2. VIH(max) = 5.3V AC. The overshoot voltage duration is ≤ 3ns. 3. VIL(min) = -2.0V AC. The overshoot voltage duration is ≤ 3ns. 4. Any input 0V ≤ VIN ≤ VDDQ. Input leakage currents include Hi-Z output leakage for all bi-directional buffers with tri-state outputs. 5. DOUT is disabled, 0V ≤ VOUT ≤ VDDQ. |
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