STM8AP5X2BTAY datasheet(12/100 Pages) STMICROELECTRONICS

12 / 100 page

Product overview

STM8AF61xx, STM8AF51xx

12/100

Product overview

The following section intends to give an overview of the basic features of the STM8A

functional modules and peripherals.

For more detailed information please refer to the STM8A microcontroller family reference

manual (RM0009).

5.1

Central processing unit STM8A

The 8-bit STM8A core is designed for code efficiency and performance.

It contains 21 internal registers (six directly addressable in each execution context), 20

addressing modes including indexed indirect and relative addressing and 80 instructions.

5.1.1

Architecture and registers

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Harvard architecture

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3-stage pipeline

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32-bit wide program memory bus with single cycle fetching for most instructions

●

X and Y 16-bit index registers, enabling indexed addressing modes with or without

offset and read-modify-write type data manipulations

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8-bit accumulator

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24-bit program counter with 16-Mbyte linear memory space

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16-bit stack pointer with access to a 64 Kbyte stack

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8-bit condition code register with seven condition flags for the result of the last

instruction

5.1.2

Addressing

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20 addressing modes

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Indexed indirect addressing mode for look-up tables located anywhere in the address

space

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Stack pointer relative addressing mode for local variables and parameter passing

5.1.3

Instruction set

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80 instructions with 2-byte average instruction size

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Standard data movement and logic/arithmetic functions

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8-bit by 8-bit multiplication

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16-bit by 8-bit and 16-bit by 16-bit division

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Bit manipulation

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Data transfer between stack and accumulator (push/pop) with direct stack access

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Data transfer using the X and Y registers or direct memory-to-memory transfers

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