6V7 datasheet(59/298 Pages) RENESAS

59 / 298 page

Rev.1.00

May 18, 2004

page 59 of 296

M306V7MG/MH/MJ/MJA-XXXFP, M306V7FG/FH/FJ/FJAFP

2.7.13 Saving Registers

In the interrupt sequence, only the contents of the flag register (FLG) and that of the program counter

(PC) are saved in the stack area.

First, the processor saves the four higher-order bits of the program counter, and 4 upper-order bits and 8

lower-order bits of the FLG register, 16 bits in total, in the stack area, then saves 16 lower-order bits of the

program counter. Figure 2.7.6 shows the state of the stack as it was before the acceptance of the inter-

rupt request, and the state the stack after the acceptance of the interrupt request.

Save other necessary registers at the beginning of the interrupt routine using software. Using the

PUSHM instruction alone can save all the registers except the stack pointer (SP).

Address

Content of previous stack

Stack area

[SP]

Stack pointer

value before

interrupt occurs

m – 1

m – 2

m – 3

m – 4

Stack status before interrupt request

is acknowledged

Stack status after interrupt request

is acknowledged

Content of previous stack

m + 1

MSB

LSB

m – 1

m – 2

m – 3

m – 4

Address

Flag register (FLGL)

Content of previous stack

Stack area

Flag register

(FLGH)

Program

counter (PCH)

[SP]

New stack

pointer value

Content of previous stack

m + 1

MSB

LSB

Program counter (PCL)

Program counter (PCM)

Figure 2.7.6 State of stack before and after acceptance of interrupt request

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