STV0299B datasheet(23/36 Pages) STMICROELECTRONICS

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STV0299B

5REGISTER LIST (continued)

23/36

TIMING LOCK SETTING REGISTER (refer to )

TLSR

[7:4]

Must be programmed to 8 (to be confirmed)

[3:0]

Must be programmed to 4 (to be confirmed)

CARRIER FREQUENCY DETECTOR REGISTER (refer to

Chapter 4.4 on page 14)

CFD

1: Carrier Frequency Offset Detector coupled to Carrier recover loop

0: Carrier Frequency Offset Detector disabled

[6:4]

Gain for Carrier Frequency Offset Detector

[3:2]

Time constant for Carrier Frequency Offset Detector

[1:0]

Lock Detector threshold to disable the Carrier Frequency Offset

Detector:

00: -16

01: -32

10: -48

11: -64

ALPHA CARRIER AND NOISE ESTIMATOR REGISTER (refer to

Chapter 4.5 on page 14)

ACLC

Derotator On/Off

1: On

0: Off

This bit must be programmed to zero.

[5:4]

Noise Estimator Time Constant

00: 4 k symbols

01: 16 k symbols

10: 64 k symbols

11: 256 k symbols

[3:0]

alpha_car

Bits 3, 2 and 1: b[2:0]

Bit 0: a

BETA CARRIER REGISTER (refer to

Chapter 4.4 on page 14)

BCLC

[7:6]

phase_detector_algo

Phase detector algorithm:

00: Algorithm 0 (BPSK application)

01: Algorithm 1 (QPSK application)

10: Algorithm 2 (QPSK application)

11: Reserved

[5:0]

beta_car

Bits 5 to 2: e[3:0]

Bit 1: c

Bit 0: d

CARRIER LOCK DETECTOR THRESHOLD REGISTER (refer to

Section 4.4.2 on page 14)

CLDT

[7:0]

Signed Number

AGC1 INTEGRATOR REGISTER (refer to

Section 4.2.2 on page 12)

AGC1I

[7:0]

AGC Integrator Value (Signed Number)

TIMING LOCK INDICATOR REGISTER (refer to

Section 4.3.3 on page 13)

TLIR

[7:0]

(Not Signed)

Name

HEX

Address

Reset

Value

Bit

Position

Signal Description

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