M32C83T datasheet(81/527 Pages) RENESAS

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Page 58

7. Bus

)

(

7.2.4 Bus Timing

Bus cycle for the internal ROM and internal RAM are basically one BCLK cycle. When the PM12 bit in the

PM1 register is set to "1" (wait state), the bus cycles are two BCLK cycles.

Bus cycles for the SFR are basically two BCLK cycles. When the PM13 bit in the PM1 register is set to "1"

(2 wait states), the bus cycles are three BCLK cycles. To access CAN-associated registers (addresses

01E016 to 024516), set the PM13 bit to "1".

Bus cycle for an external space is basically one BCLK cycle for a read operation and two BCLK cycles for

a write operation. The WCR register inserts wait states equivalent to one to three BCLK cycles into an

external space. Bus cycles are two BCLK cycles if selecting one wait state. Bus cycles are four BCLK

cycles if selecting three wait states.

If applicable to the followings, bus cycles vary from those selected by the WCR register. Figure 7.5

shows each bit status and bus cycle.

• Write cycle with the separate bus and no wait state

• Read cycle and write cycle with the multiplexed bus and no wait state.

• Read cycle and write cycle with the multiplexed bus and one wait state.

Figure 7.3 shows the WCR register. Figures 7.4 and 7.5 show bus timing in an external space.

Figure 7.3 WCR Register

NOTES:

1. When using the multiplexed bus, "2 waits" is selected even if the WCR register is set to "002" (no

wait state) or "012" (1 wait state). "102" (2 wait states) and "112" (3 wait states) can be selected.

2. When using the separate bus, the read bus runs one BCLK cycle and the write bus runs two

BCLK cycles (1 wait state) if the WCR register is set to "002".

3.The WCR register cannot be used in M32C/83T.

Symbol

Address

After Reset

WCR

000816

1111 11112

Wait Control Register(1, 2, 3)

WCR0

WCR1

WCR2

WCR3

WCR4

WCR5

WCR6

WCR7

0 0: No wait state

0 1: 1 wait state

1 0: 2 wait states

1 1: 3 wait states

0 0: No wait state

0 1: 1 wait state

1 0: 2 wait states

1 1: 3 wait states

0 0: No wait state

0 1: 1 wait state

1 0: 2 wait states

1 1: 3 wait states

0 0: No wait state

0 1: 1 wait state

1 0: 2 wait states

1 1: 3 wait states

Bit Name

Function

Bit

Symbol

External Space 0

Wait Bit

External Space 1

Wait Bit

External Space 2

Wait Bit

External Space 3

Wait Bit

b1 b0

b3 b2

b5 b4

b7 b6

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