M32C83T datasheet(93/527 Pages) RENESAS

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Page 70

8. Clock Generation Circuit

)

(

Figure 8.5 CM2 Register

CM20

CM21

CM22

CM23

(b7 - b4)

Oscillation Stop Detect Register(1)

CPU Clock Select Bit(2, 3)

Oscillation Stop Detect

Enable Bit

XIN Clock Monitor Flag(5)

Oscillation Stop Detect

Flag(4)

Reserved Bit

0: Main clock oscillates

1: Main clock stops

0: Clock selected by the CM17 bit

1: On-chip oscillator clock

0: Main clock does not stop

1: Detects main clock stop

0: Disables oscillation stop detect function

1: Enables oscillation stop detect function

Set to "0"

Symbol

Address

After Reset

CM2

000D16

0016

Function

Bit Name

Bit

Symbol

NOTES:

1. Rewrite the CM2 register after the PRC0 bit in the PRCR register is set to "1" (write enable).

2. When the main clock oscillation stop is detected while the CM20 bit is set to "1" (oscillation stop

detect function enabled), the CM21 bit is set to "1". Although the main clock starts oscillating, the

CM21 bit is not set to "0". When the main clock is used as a CPU clock source after the main clock

resumes oscillation, set the CM21 bit to "0" by program.

3. When the CM20 bit is set to "1" (oscillation stop detect function enabled) and the CM22 bit is set to "1", do

not set the CM21 bit to "0".

4. When a main clock stop is detected, the CM22 bit is set to "1". The CM22 bit can only be set to "0",

not "1", by program.

If the CM22 bit is set to "0" by program while the main clock is stopped, the CM22 bit cannot be set to

"1" until the next main clock stop is detected.

5. Determine the main clock state by reading the CM23 bit several times after the oscillation stop

interrupt is generated.

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