M32C83T datasheet(107/527 Pages) RENESAS

107 / 527 page

Page 84

8. Clock Generation Circuit

)

(

Table 8.7 Interrupts to Exit Wait Mode

Interrupt

When CM02=0

When CM02=1

_______

NMI Interrupt

Available

Serial I/O Interrupt

Available when the internal and external

Available only when the external clock is used

clocks are used

Key Input Interrupt

Available

A/D Conversion Interrupt

Available in single or single-sweep mode Do not use

Timer A Interrupt

Available in all modes

Available in event counter mode or when

Timer B Interrupt

the count source is fC32

______

INT Interrupt

Available

CAN Interrupt

Available

Do not use

Intelligent I/O Interrupt

Available

Do not use

8.5.3 Stop Mode

In stop mode, all oscillators and resonators stop. The CPU clock and peripheral function clock, as well as

the CPU and peripheral functions operated by these clocks, also stop. The least power required to

operate the microcomputer is in stop mode. The internal RAM holds its data if the voltage applied to the

Vcc pin is 2.5V or more.

______

Interrupts used to exit stop mode are NMI interrupt, key input interrupt, and INT interrupt.

8.5.3.1 Entering Stop Mode

Stop mode is entered when setting the CM10 bit in the CM1 register to "1" (all clocks stops). The

MCD4 to MCD0 bits in the MCD register become set to "010002" (divide-by-8 mode).

Enter stop mode after setting the followings.

• Initial Setting

Set each interrupt priority level after setting the minimum interrupt priority level required to exit stop

or wait mode, controlled by the RLVL2 to RLVL0 bits in the RLVL register, to "7".

• Before Entering Stop Mode

(1) Set the I flag to "0"

(2) Set the interrupt priority level of the interrupt being used to exit stop mode

(3) Set the interrupt priority levels of the interrupts, not being used to exit stop mode, to "0"

(4) Set IPL in the FLG register. Then set the exit priority level to the same level as IPL

(Interrupt priority level of the interrupt used to exit stop mode > interrupt priority level to exit stop

mode

≥ interrupt priority level of the interrupts not used to exit stop mode)

(5) Set the PRC0 bit in the PRCR register to "1" (write enabled)

(6) Select the main clock as the CPU clock

• When the CPU clock source is the sub clock,

Set the CM05 bit in the CM0 register to "0" (main clock oscillates) and CM07 bit in the CM0

• When the CPU clock source is the PLL clock,

Set the CM17 bit in the CM1 register to "0" (main clock) and the PLC07 bit in the PLC0 register to

"0" (PLL off)

• When the CPU clock source is the on-chip oscillator clock,

Set the MCD4 to MCD0 bits to "010002" (divide-by-8 mode), the CM05 bit to "0" (main clock

oscillates), and the CM21 it in the CM2 register to "0" (clock selected by the CM17 bit)

M32C83T Datasheet(PDF) 107 Page - Renesas Technology Corp

M32C83T Datasheet(HTML) 107 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL