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M32C83T Datasheet(PDF) 121 Page - Renesas Technology Corp

Part # M32C83T
Description  16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES
PDF  527 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M32C83T Datasheet(HTML) 121 Page - Renesas Technology Corp

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Page 98
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10. Interrupts
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Exit Priority Register
After Reset
XXXX 00002
Address
009F16
Symbol
RLVL
RW
RW
RW
RW
RW
RW
RLVL0
RLVL1
RLVL2
Stop/Wait Mode Exit
Minimum Interrupt Priority
Level Control Bit(1)
FSIT
High-Speed Interrupt
Set Bit(2)
0: Interrupt priority level 7 is used
for normal interrupt
1: Interrupt priority level 7 is used
for high-speed interrupt
DMA II
(b4)
(b7 - b6)
DMAC II Select Bit(4)
0: Interrupt priority level 7 is used
for interrupt
1: Interrupt priority level 7 is used
for DMAC II transfer(3)
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
0 0 0 : Level 0
0 0 1 : Level 1
0 1 0 : Level 2
0 1 1 : Level 3
1 0 0 : Level 4
1 0 1 : Level 5
1 1 0 : Level 6
1 1 1 : Level 7
b2 b1 b0
Bit Name
Function
Bit
Symbol
b7
b6
b5
b4
b3
b2
b1
b0
NOTES:
1. The microcomputer exits stop or wait mode when the requested interrupt priority level is higher than
the level set in the RLVL2 to RLVL0 bits. Set the RLVL2 to RLVL0 bits to the same value as IPL in
the FLG register.
2. When the FSIT bit is set to "1", interrupt priority level 7 becomes the high-speed interrupt. In this
case, set only one interrupt to interrupt priority level 7 and the DMA II bit to "0".
3. Set the ILVL2 to ILVL0 bits in the interrupt control register after setting the DMAII bit to "1". Do not
change the DMAII bit setting to "0" after setting the DMAII bit to "1". Set the FSIT bit to "0" when the
DMAII bit to "1".
4. After reset, the DMA II bit is indeterminate. When using an interrupt, set the interrupt control register
after setting the DMA II bit to "0".
Figure 10.5 RLVL Register
10.6.2.3 RLVL2 to RLVL0 Bits
When using an interrupt to exit stop or wait mode, refer to 8.5.2 Wait Mode and 8.5.3 Stop Mode for
details.



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