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HD6432351 Datasheet(PDF) 261 Page - Renesas Technology Corp

Part # HD6432351
Description  16-Bit Single-Chip Microcomputer
PDF  1025 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6432351 Datasheet(HTML) 261 Page - Renesas Technology Corp

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Section 7 DMA Controller (DMAC)
Rev. 3.00 Sep 15, 2006 page 227 of 988
REJ09B0330-0300
Bits 2 and 0—Data Transfer End Interrupt Enable A (DTIEA): These bits enable or disable
an interrupt to the CPU or DTC when transfer ends. If DTIEA bit is set to 1 when DTE = 0, the
DMAC regards this as indicating the end of a transfer, and issues a transfer end interrupt request to
the CPU or DTC.
A transfer end interrupt can be canceled either by clearing the DTIEA bit to 0 in the interrupt
handling routine, or by performing processing to continue transfer by setting the transfer counter
and address register again, and then setting the DTE bit to 1.
Bit 2—Data Transfer Interrupt Enable 1A (DTIE1A): Enables or disables the channel 1
transfer end interrupt.
Bit 2
DTIE1A
Description
0
Transfer end interrupt disabled
(Initial value)
1
Transfer end interrupt enabled
Bit 0—Data Transfer Interrupt Enable 0A (DTIE0A): Enables or disables the channel 0
transfer end interrupt.
Bit 0
DTIE0A
Description
0
Transfer end interrupt disabled
(Initial value)
1
Transfer end interrupt enabled



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