HD6432147SW datasheet(33/1177 Pages) RENESAS

33 / 1177 page

Rev. 4.00 Sep 27, 2006 page xxxiii of xliv

12.3.2 Compare-Match Timing....................................................................................... 363

12.3.3 TCNT External Reset Timing .............................................................................. 364

12.3.4 Timing of Overflow Flag (OVF) Setting ............................................................. 365

12.3.5 Operation with Cascaded Connection.................................................................. 365

12.3.6 Input Capture Operation ...................................................................................... 367

12.4

Interrupt Sources ............................................................................................................... 369

12.5

8-Bit Timer Application Example..................................................................................... 370

12.6

Usage Notes ...................................................................................................................... 371

12.6.1 Contention between TCNT Write and Clear........................................................ 371

12.6.2 Contention between TCNT Write and Increment ................................................ 372

12.6.3 Contention between TCOR Write and Compare-Match ...................................... 373

12.6.4 Contention between Compare-Matches A and B ................................................. 374

12.6.5 Switching of Internal Clocks and TCNT Operation............................................. 374

Section 13 Timer Connection........................................................................................... 377

13.1

Overview........................................................................................................................... 377

13.1.1 Features................................................................................................................ 377

13.1.2 Block Diagram ..................................................................................................... 377

13.1.3 Input and Output Pins .......................................................................................... 379

13.1.4 Register Configuration......................................................................................... 380

13.2

Register Descriptions ........................................................................................................ 380

13.2.1 Timer Connection Register I (TCONRI) ............................................................. 380

13.2.2 Timer Connection Register O (TCONRO) .......................................................... 383

13.2.3 Timer Connection Register S (TCONRS)............................................................ 385

13.2.4 Edge Sense Register (SEDGR) ............................................................................ 387

13.2.5 Module Stop Control Register (MSTPCR) .......................................................... 390

13.3

Operation .......................................................................................................................... 391

13.3.1 PWM Decoding (PDC Signal Generation) .......................................................... 391

13.3.2 Clamp Waveform Generation (CL1/CL2/CL3 Signal Generation) ..................... 393

13.3.3 Measurement of 8-Bit Timer Divided Waveform Period .................................... 394

13.3.4 IHI Signal and 2fH Modification ......................................................................... 396

13.3.5 IVI Signal Fall Modification and IHI Synchronization ....................................... 398

13.3.6 Internal Synchronization Signal Generation

(IHG/IVG/CL4 Signal Generation) ..................................................................... 400

13.3.7 HSYNCO Output ................................................................................................. 403

13.3.8 VSYNCO Output ................................................................................................. 404

13.3.9 CBLANK Output ................................................................................................. 405

Section 14 Watchdog Timer (WDT).............................................................................. 407

14.1

Overview........................................................................................................................... 407

14.1.1 Features................................................................................................................ 407

HD6432147SW Datasheet(PDF) 33 Page - Renesas Technology Corp

HD6432147SW Datasheet(HTML) 33 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL