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HD6432142 Datasheet(PDF) 376 Page - Renesas Technology Corp |
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HD6432142 Datasheet(HTML) 376 Page - Renesas Technology Corp |
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376 / 1177 page ![]() Section 11 16-Bit Free-Running Timer Rev. 4.00 Sep 27, 2006 page 332 of 1130 REJ09B0327-0400 11.3.9 ICRD and OCRDM Mask Signal Generation When the ICRDMS bit in TOCR is set to 1 and the contents of OCRDM are other than H'0000, a signal that masks the ICRD input capture function is generated. The mask signal is set by the input capture signal. The mask signal setting timing is shown in figure 11.15. The mask signal is cleared by the sum of the ICRD contents and twice the OCRDM contents, and an FRC compare-match. The mask signal clearing timing is shown in figure 11.16. Input capture mask signal φ Input capture signal Figure 11.15 Input Capture Mask Signal Setting Timing Compare-match signal ICRD + OCRDM × 2 FRC φ N Input capture mask signal N N+1 Figure 11.16 Input Capture Mask Signal Clearing Timing |
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