HD6432142 datasheet(466/1177 Pages) RENESAS

Part #	HD6432142

Description	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

PDF	1177 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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Section 14 Watchdog Timer (WDT)

Rev. 4.00 Sep 27, 2006 page 422 of 1130

REJ09B0327-0400

Caution is therefore required when using WDT1 as the realtime clock counter.

No error occurs in the counter value while WDT1 is operating in the same mode.

14.5.6

OVF Flag Clear Condition

To clear OVF flag in WOVI handling routine, read TCSR when OVF = 1, then write with 0 to

OVF, as stated above. When WOVI is masked and OVF flag is poling, if contention between OVF

flag set and TCSR read is occurred, OVF = 1 is read but OVF can not be cleared by writing with 0

to OVF.

In this case, reading TCSR when OVF = 1 two times meet the requirements of OVF clear

condition. Please read TCSR when OVF = 1 two times before writing with 0 to OVF.

LOOP

BTST.B

#7, @TCSR

; OVF flag read

BEQ

LOOP

; if OVF=1, exit from loop

MOV.B

@TCSR, R0L

; OVF=1 read again

MOV.W

#H'A521, R0

; OVF flag clear

MOV.W

R0,@TCSR

;

HD6432142 Datasheet(PDF) 466 Page - Renesas Technology Corp