7641 datasheet(4/385 Pages) RENESAS

4 / 385 page

BEFORE USING THIS MANUAL

This user’s manual consists of the following three chapters. Refer to the chapter appropriate to your conditions,

such as hardware design or software development. Chapter 3 also includes necessary information for

systems development. You must refer to that chapter.

1. Organization

q CHAPTER 1 HARDWARE

This chapter describes features of the microcomputer and operation of each peripheral function.

q CHAPTER 2 APPLICATION

This chapter describes usage and application examples of peripheral functions, based mainly on

setting examples of relevant registers.

q CHAPTER 3 APPENDIX

This chapter includes necessary information for systems development using the microcomputer, such

as the electrical characteristics, the notes, and the list of registers.

✽For the mask ROM confirmation form, the ROM programming confirmation form, and the mark

specifications, refer to the “Renesas Technology” Homepage (http://www.renesas.com/en/rom).

2. Structure of register

The figure of each register structure describes its functions, contents at reset, and attributes as follows :

Note 2: Bit attributes.........The attributes of control register bits are classified into 3 bytes : read-only, write-

only and read and write. In the figure, these attributes are represented as follows :

: Bit in which nothing is arranged

0 1 :

Name

Function

At reset

Contents immediately after reset release

Bit attributes

(Note 1)

Processor mode bits

Stack page selection bit

Nothing arranged for these bits. These are write disabled

bits. When these bits are read out, the contents are “0.”

Fix this bit to “0.”

Main clock (XIN-XOUT) stop bit

Internal system clock selection bit

0 0 : Single-chip mode

1 0 :

1 1 :

Not available

b1 b0

0 : 0 page

1 : 1 page

0 : Operating

1 : Stopped

0 : XIN-XOUT selected

1 : XCIN-XCOUT selected

: Bit that is not used for control of the corresponding function

Note 1:. Contents immediately after reset release

0....... “0” at reset release

1....... “1” at reset release

?.......Undefined at reset release

✽.......Contents determined by option at reset release

R....... Read

...... Read enabled

✕.......Read disabled

W......Write

..... Write enabled

✕...... Write disabled

(Note 2)

CPU mode register (CPUM) [Address : 3B16]

Bits

✽

3. Supplementation

For details of development support tools, refer to the “Renesas Technology” Homepage (http://www.renesas.com).

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