SH7101 datasheet(42/560 Pages) RENESAS

42 / 560 page

Section 1 Overview

Rev.1.00 Sep. 18, 2008 Page 8 of 522

REJ09B0069-0100

Type

Symbol

I/O

Name

Function

MD3 to MD0

Input

Set the mode

Set the operating mode. Inputs at these

pins should not be changed during

operation.

Operating

mode control

FWP

Input

Protection

against write

operation into

flash memory

Pin for the flash memory. This pin is only

used in the flash memory version. Writing

or erasing of flash memory can be

protected. This pin becomes the VCC pin

for the masked ROM version.

RES

Input

Power-on

reset

When this pin is driven low, the chip

becomes to power-on reset state.

MRES

Input

Manual reset

When this pin is driven low, the chip

becomes to manual reset state.

HSTBY

Input

Standby

When this pin is driven low, the chip shifts

to standby mode.

WDTOVF

Output

Watchdog

timer overflow

Output signal for the watchdog timer

overflow. If this pin need to be pulled-

down, use the resistor larger than 1 M

Ω to

pull the pin down.

BREQ

Input

Bus request

Driven low when an external device

request the bus to be released.

System

control

BACK

Output

Bus request

acknowledge

Indicates that the bus is released to the

external device. The device output the

BREQ signal controls the bus after it has

received the

BACK signal.

NMI

Input

Non-maskable

interrupt

Non-maskable interrupt pin. If this pin is

not used, it should be fixed high or low.

IRQ3 to IRQ0 Input

Interrupt

request 3 to 0

These pins request a maskable interrupt.

One of the level input or edge input can be

selected. In case of the edge input, one of

the rising edge, falling edge, or both can

be selected.

Interrupts

IRQOUT

Output

Interrupt

request output

Shows that an interrupt cause has

occurred. It is informed of an interrupt

even when the bus is released.

Address bus A17 to A0

Output

Address bus

These pins output addresses.

Data bus

D7 to D0

I/O

Data bus

8-bit bidirectional bus.

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