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SH7101 Datasheet(PDF) 24 Page - Renesas Technology Corp |
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SH7101 Datasheet(HTML) 24 Page - Renesas Technology Corp |
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24 / 560 page  Rev.1.00 Sep. 18, 2008 Page xxiv of xxxiv REJ09B0069-0100 Figure 8.67 TCIU Interrupt Setting Timing............................................................................... 217 Figure 8.68 Timing for Status Flag Clearing by the CPU ......................................................... 218 Figure 8.69 Phase Difference, Overlap, and Pulse Width in Phase Counting Mode ................. 219 Figure 8.70 Contention between TCNT Write and Clear Operations........................................ 220 Figure 8.71 Contention between TCNT Write and Increment Operations ................................ 220 Figure 8.72 Contention between TGR Write and Compare Match ........................................... 221 Figure 8.73 Contention between Buffer Register Write and Compare Match (Channel 0) ....... 222 Figure 8.74 Contention between Buffer Register Write and Compare Match (Channels 3 and 4).................................................................................................. 223 Figure 8.75 Contention between TGR Read and Input Capture ................................................ 224 Figure 8.76 Contention between TGR Write and Input Capture ............................................... 225 Figure 8.77 Contention between Buffer Register Write and Input Capture............................... 226 Figure 8.78 TCNT_2 Write and Overflow/Underflow Contention with Cascade Connection.. 227 Figure 8.79 Counter Value during Complementary PWM Mode Stop ..................................... 228 Figure 8.80 Buffer Operation and Compare-Match Flags in Reset Sync PWM Mode.............. 229 Figure 8.81 Reset Sync PWM Mode Overflow Flag ................................................................. 230 Figure 8.82 Contention between Overflow and Counter Clearing ............................................ 231 Figure 8.83 Contention between TCNT Write and Overflow ................................................... 231 Figure 8.84 Error Occurrence in Normal Mode, Recovery in Normal Mode............................ 236 Figure 8.85 Error Occurrence in Normal Mode, Recovery in PWM Mode 1............................ 237 Figure 8.86 Error Occurrence in Normal Mode, Recovery in PWM Mode 2............................ 237 Figure 8.87 Error Occurrence in Normal Mode, Recovery in Phase Counting Mode ............... 238 Figure 8.88 Error Occurrence in Normal Mode, Recovery in Complementary PWM Mode .... 239 Figure 8.89 Error Occurrence in Normal Mode, Recovery in Reset-Synchronous PWM Mode ............................................................................ 240 Figure 8.90 Error Occurrence in PWM Mode 1, Recovery in Normal Mode............................ 241 Figure 8.91 Error Occurrence in PWM Mode 1, Recovery in PWM Mode 1 ........................... 242 Figure 8.92 Error Occurrence in PWM Mode 1, Recovery in PWM Mode 2 ........................... 242 Figure 8.93 Error Occurrence in PWM Mode 1, Recovery in Phase Counting Mode............... 243 Figure 8.94 Error Occurrence in PWM Mode 1, Recovery in Complementary PWM Mode.... 244 Figure 8.95 Error Occurrence in PWM Mode 1, Recovery in Reset-Synchronous PWM Mode ............................................................................ 245 Figure 8.96 Error Occurrence in PWM Mode 2, Recovery in Normal Mode............................ 246 Figure 8.97 Error Occurrence in PWM Mode 2, Recovery in PWM Mode 1 ........................... 247 Figure 8.98 Error Occurrence in PWM Mode 2, Recovery in PWM Mode 2 ........................... 247 Figure 8.99 Error Occurrence in PWM Mode 2, Recovery in Phase Counting Mode............... 248 Figure 8.100 Error Occurrence in Phase Counting Mode, Recovery in Normal Mode ............... 249 Figure 8.101 Error Occurrence in Phase Counting Mode, Recovery in PWM Mode 1............... 250 Figure 8.102 Error Occurrence in Phase Counting Mode, Recovery in PWM Mode 2............... 250 |
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