SH7052 datasheet(129/919 Pages) RENESAS

129 / 919 page

103

UBAMRL:

Bit:

UBM15

UBM14

UBM13

UBM12

UBM11

UBM10

UBM9

UBM8

Initial value:

R/W:

R/W

Bit:

UBM7

UBM6

UBM5

UBM4

UBM3

UBM2

UBM1

UBM0

Initial value:

R/W:

R/W

The user break address mask register (UBAMR) consists of user break address mask register H

(UBAMRH) and user break address mask register L (UBAMRL). Both are 16-bit

readable/writable registers. UBAMRH designates whether to mask any of the break address bits

established in UBARH, and UBAMRL designates whether to mask any of the break address bits

established in UBARL. UBAMRH and UBAMRL are initialized to H'0000 by a power-on reset

and in module standby mode. They are not initialized in software standby mode.

• UBAMRH Bits 15 to 0—User Break Address Mask 31 to 16 (UBM31 to UBM16): These bits

designate whether to mask the corresponding break address 31 to 16 bits (UBA31 to UBA16)

established in UBARH.

• UBAMRL Bits 15 to 0—User Break Address Mask 15 to 0 (UBM15 to UBM0): These bits

designate whether to mask the corresponding break address 15 to 0 bits (UBA15 to UBA0)

established in UBARL.

Bit 15 to 0: UBMn

Description

Break address UBAn is included in the break conditions (Initial value)

Break address UBAn is not included in the break conditions

Note:

n = 31 to 0

SH7052 Datasheet(PDF) 129 Page - Renesas Technology Corp

SH7052 Datasheet(HTML) 129 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL