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SH7708 Datasheet(PDF) 233 Page - Renesas Technology Corp

Part # SH7708
Description  SuperH??RISC engine
PDF  633 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7708 Datasheet(HTML) 233 Page - Renesas Technology Corp

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Bits 9 and 8—CAS-Before-RAS Refresh RAS Assert Time (TRAS1, TRAS0): These bits set the
RAS assert period for CAS-before-RAS refreshing of the DRAM connected to area 2.
In the SH7708, set the same values in the TRAS bits in MCR and DCR.
Bit 9: TRAS1
Bit 8: TRAS0
Description
0
0
2 cycles
(Initial value)
1
3 cycles
1
0
4 cycles
1
5 cycles
Bit 6—Burst Enable (BE): Specifies whether to conduct a burst access of the DRAM connected to
area 2.
Bit 6: BE
Description
0
Burst disabled
(Initial value)
1
High-speed page mode access
Bits 4 and 3—Address Multiplex (AMX1, AMX0): These bits specify address multiplexing for
the DRAM connected to area 2.
Bit 4: AMX1
Bit 3: AMX0
Description
0
0
8-bit column address product
(Initial value)
1
9-bit column address product
1
0
10-bit column address product
1
11-bit column address product
Bit 2—Refresh Control (RFSH): Determines whether or not refreshing of the DRAM connected to
area 2 is performed.
Bit 2: RFSH
Description
0
No refresh
(Initial value)
1
Refresh



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