TDA9106 datasheet(25/30 Pages) STMICROELECTRONICS

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III.2 - EW

EWOUT = 2.5V + K1 (VOUT -VDCOUT)

+K2(VOUT -VDCOUT)

+K3(VOUT -VDCOUT)

2 |VOSC -VMID|

+K4(VOUT -VDCOUT)|VOSC -VMID|

VOSC is the ramp Pin 27 and VMID the middle of it,

typically 3.5V

K1 is adjustable by EW amplitude I

2C register

K2 is adjustable by Keystone I

2C register

K3 is adjustable by Cbow Corner I

2C register

K4 is adjustable by Spin Corner I

2C register

III.3 - Dynamic Horizontal Phase Control

IOUT =K5 (VOUT -VDCOUT)

2 +K6 (VOUT -VDCOUT)

K5 is adjustable by SidePin Balance I

2C register

K6 is adjustable by Parallelogram I

2C register

III.4 - Vertical Dynamic Focus

VFOCOUT = 6V - 0.7 (VOUT -VDCOUT)

No adjustment is available for this part except by

means of tracking.

III.5 - Vertical Sawtooth Generator

The vertical part generates a fixed amplitude ramp

which can be affectedby S and C correction shape.

Then, the amplitudeof this ramp is adjustedto drive

an external power stage (see Figure 22).

The internal reference voltage used for the vertical

part is available between Pin 26 and Pin 24. Its

typical value is :

V26 =VREF =8V

The charge of the external capacitor on Pin 27

(VCAP) generates a fixed amplituderamp between

the internal voltages, Vl (Vl =VREF/4) and VH (VH =

5/8 x VREF).

OPERATING DESCRIPTION (continued)

PARABOLA

GENERATOR

OSCILLATOR

OSC

CAP

DISCH.

H/HVIN

POLARITY

SAMPLING

SAMP.

CAP

Vlow

Sawth.

Disch.

REF

TRANSCONDUCTANCE

AMPLIFIER

CHARGE CURRENT

29 VERT_OUT

VERT_AMP

SUB05/7bits

VS_AMP

SUB07/6bits

COR_C

SUB08/6bits

S CORRECTION

C CORRECTION

EW_AMP

SUB09/6bits

EW_OUT

EW_CENT

SUB0A/6bits

SPB_AMP

SUB0D/6bits

SPB_OUT

V_FOCUS

PARAL

SUB0E/6bits

CORNER

Corner

SUB0B/6bits

Corner Balance

SUB0C/6bits

Internal Signal to PLL2

SYNC

PROCESSOR

VSYNCIN

S/G

Figure 22 : Vertical Part Block Diagram

TDA9106

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