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CS5461A Datasheet(PDF) 8 Page - Cirrus Logic

Part # CS5461A
Description  Single Phase, Bi-directional Power/Energy IC
PDF  44 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS5461A Datasheet(HTML) 8 Page - Cirrus Logic

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CS5461A
8
DS661F2
ANALOG CHARACTERISTICS (Continued)
1.
Applies when the HPF option is enabled.
2.
Applies before system calibration.
3.
All outputs unloaded. All inputs CMOS level.
4.
Measurement method for PSRR: VREFIN tied to VREFOUT, VA+ = VD+ = 5 V, a 150 mV (zero-to-peak) (60 Hz)
sinewave is imposed onto the +5 V DC supply voltage at VA+ and VD+ pins. The “+” and “-” input pins of both input
channels are shorted to AGND. Then the CS5461A is commanded to continuous conversion acquisition mode, and
digital output data is collected for the channel under test. The (zero-to-peak) value of the digital sinusoidal output
signal is determined, and this value is converted into the (zero-to-peak) value of the sinusoidal voltage (measured
in mV) that would need to be applied at the channel’s inputs, in order to cause the same digital sinusoidal output.
This voltage is then defined as Veq. PSRR is then (in dB):
5.
When voltage level on PFMON is sagging, and LSD bit is at 0, the voltage at which LSD bit is set to 1.
6.
If the LSD bit has been set to 1 (because PFMON voltage fell below PMLO), this is the voltage level on PFMON at
which the LSD bit can be permanently reset back to 0.
VOLTAGE REFERENCE
Notes:
7.
The voltage at VREFOUT is measured across the temperature range. From these measurements the following
formula is used to calculate the VREFOUT Temperature Coefficient:.
8.
Specified at maximum recommended output of 1 µA, source or sink.
Parameter
Symbol
Min
Typ
Max
Unit
Temperature Channel
Temperature Accuracy
T
-
±5
-
°C
Power Supplies
Power Supply Currents (Active State)
IA+
ID+ (VA+ = VD+ = 5 V)
ID+ (VA+ = 5 V, VD+ = 3.3 V)
PSCA
PSCD
PSCD
-
-
-
1.1
2.9
1.7
-
-
-
mA
mA
mA
Power Consumption
Active State (VA+ = VD+ = 5 V)
(Note 3)
Active State (VA+ = 5 V, VD+ = 3.3 V)
Stand-By State
Sleep State
PC
-
-
-
-
21
12
8
10
28
16.5
-
-
mW
mW
mW
µW
Power Supply Rejection Ratio
(DC, 50 and 60 Hz)
(Note 4)
Voltage Channel
Current Channel
PSRR
45
70
65
75
-
-
dB
dB
PFMON Low-voltage Trigger Threshold
(Note 5)
PMLO
2.3
2.45
-
V
PFMON High-voltage Power-On Trip Point
(Note 6)
PMHI
-
2.55
2.7
V
Parameter
Symbol
Min
Typ
Max
Unit
Reference Output
Output Voltage
VREFOUT
+2.4
+2.5
+2.6
V
Temperature Coefficient
(Note 7)
TCVREF
-
25
60
ppm/°C
Load Regulation
(Note 8)
∆VR
-6
10
mV
Reference Input
Input Voltage Range
VREFIN
+2.4
+2.5
+2.6
V
Input Capacitance
-
4
-
pF
Input CVF Current
-
25
-
nA
PSRR
20
150
V
eq
----------
⎩⎭
⎨⎬
⎧⎫
log
⋅
=
( V REF O UT MA X - VR EF O U T MIN )
VR EF O U T AVG
(
1
T
A
MA X
- T
A
MI N
(
1. 0 x 1 0
(
6
TC
VR EF
=



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