AT89C5131A-RDTUM datasheet(127/188 Pages) ATMEL

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127

4337K–USB–04/08

AT89C5130A/31A-M

21.4.2

Bulk/Interrupt OUT Transactions in Ping-pong Mode

Figure 21-8. Bulk/Interrupt OUT Transactions in Ping-pong Mode

An endpoint will be first enabled and configured before being able to receive Bulk or Interrupt

packets.

When a valid OUT packet is received on the endpoint bank 0, the RXOUTB0 bit is set by the

USB controller. This triggers an interrupt if enabled. The firmware has to select the correspond-

ing endpoint, store the number of data bytes by reading the UBYCTLX and UBYCTHX registers.

If the received packet is a ZLP (Zero Length Packet), the UBYCTLX and UBYCTHX register val-

ues are equal to 0 and no data has to be read.

When all the endpoint FIFO bytes have been read, the firmware will clear the RXOUB0 bit to

allow the USB controller to accept the next OUT packet on the endpoint bank 0. This action

switches the endpoint bank 0 and 1. Until the RXOUTB0 bit has been cleared by the firmware,

the USB controller will answer a NAK handshake for each OUT requests on the bank 0 endpoint

FIFO.

When a new valid OUT packet is received on the endpoint bank 1, the RXOUTB1 bit is set by

the USB controller. This triggers an interrupt if enabled. The firmware empties the bank 1 end-

point FIFO before clearing the RXOUTB1 bit. Until the RXOUTB1 bit has been cleared by the

firmware, the USB controller will answer a NAK handshake for each OUT requests on the bank 1

endpoint FIFO.

The RXOUTB0 and RXOUTB1 bits are alternatively set by the USB controller at each new valid

packet receipt.

The firmware has to clear one of these two bits after having read all the data FIFO to allow a new

valid packet to be stored in the corresponding bank.

OUT

DATA0 (n Bytes)

ACK

HOST

UFI

C51

Endpoint FIFO Bank 0 - Read Byte 1

RXOUTB0

Endpoint FIFO Bank 0 - Read Byte 2

Endpoint FIFO Bank 0 - Read Byte n

Clear RXOUTB0

OUT

DATA1 (m Bytes)

ACK

RXOUTB1

Endpoint FIFO Bank 1 - Read Byte 1

Endpoint FIFO Bank 1 - Read Byte 2

Endpoint FIFO Bank 1 - Read Byte m

Clear RXOUTB1

OUT

DATA0 (p Bytes)

ACK

RXOUTB0

Endpoint FIFO Bank 0 - Read Byte 1

Endpoint FIFO Bank 0 - Read Byte 2

Endpoint FIFO Bank 0 - Read Byte p

Clear RXOUTB0

AT89C5131A-RDTUM Datasheet(PDF) 127 Page - ATMEL Corporation

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