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HCPL-261A Datasheet(PDF) 15 Page - AVAGO TECHNOLOGIES LIMITED |
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HCPL-261A Datasheet(HTML) 15 Page - AVAGO TECHNOLOGIES LIMITED |
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15 / 17 page ![]() 15 Figure 22. TTL interface circuit for the HCPL-261A/-261N families. 420 Ω (MAX) HCPL-�261A fig 21 1 3 2 4 2N3906 (ANY PNP) VCC 74L504 (ANY TTL/CMOS GATE) HCPL-261X LED Table 1 indicates the directions of I LP and ILN flow depend- ing on the direction of the common-mode transient. For transients occurring when the LED is on, common- mode rejection (CMR L, since the output is in the “low” state) depends upon the amount of LED current drive (I F). For conditions where I F is close to the switching thresh- old (I TH), CMRL also depends on the extent which ILP and ILN balance each other. In other words, any condition where common-mode transients cause a momentary decrease in I F (i.e. when dVCM/dt>0 and |IFP| > |IFN|, referring to Table 1) will cause common-mode failure for transients which are fast enough. Likewise for common-mode transients which occur when the LED is off (i.e. CMR H, since the output is “high”), if an imbalance between I LP and ILN results in a transient I F equal to or greater than the switching threshold of the optocoupler, the transient “signal”may cause the output to spike below 2 V (which constitutes a CMR H failure). By using the recommended circuit in Figure 20, good CMR can be achieved. (In the case of the -261N families, a minimum CMR of 15 kV/µs is guaranteed using this cir- cuit.) The balanced I LED-setting resistors help equalize ILP and I LN to reduce the amount by which ILED is modulated from transient coupling through C LA and CLC. CMR with Other Drive Circuits CMR performance with drive circuits other than that shown in Figure 20 may be enhanced by following these guidelines: 1. Use of drive circuits where current is shunted from the LED in the LED “off” state (as shown in Figures 22 and 23). This is beneficial for good CMR H. 2. Use of I FH > 3.5 mA. This is good for high CMRL. Using any one of the drive circuits in Figures 22-24 with I F = 10 mA will result in a typical CMR of 8 kV/µs for the HCPL-261N family, as long as the PC board layout prac- tices are followed. Figure 22 shows a circuit which can be used with any totem-pole-output TTL/LSTTL/HCMOS logic gate. The buffer PNP transistor allows the circuit to be used with logic devices which have low current-sink- ing capability. It also helps maintain the driving-gate power-supply current at a constant level to minimize ground shifting for other devices connected to the in- put-supply ground. When using an open-collector TTL or open-drain CMOS logic gate, the circuit in Figure 23 may be used. When using a CMOS gate to drive the optocoupler, the circuit shown in Figure 24 may be used. The diode in parallel with the R LED speeds the turn-off of the optocoupler LED. Figure 21. AC equivalent circuit for HCPL-261X. 350 Ω HCPL-�261A fig 20 1/2 RLED VCC+ 15 pF + VCM 8 7 6 1 3 SHIELD 5 2 4 CLA VO GND 0.01 µF 1/2 RLED CLC ILN ILP – |
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