LTC1272

10

1272fb

1272fb

1272fb

S

APPLICATI

I FOR ATIO

Figure 7. Operating Waveforms Using an External Clock Source for CLK IN

LTC1272 • TA08

CS & RD

BUSY

CLK IN

50ns TYP

DB0

(LSB)

DB1

DB10

DB11

(MSB)

CLK OUT

LTC1272 • TA10

–

+

CURVATURE

CORRECTED

BANDGAP

REFERENCE

TO DAC

AGND

5V

LTC1272

0.1

µF

10

µF

2

3

Figure 8. LTC1272 Internal 2.42V Reference

Unipolar Operation

Figure 9 shows the ideal input/output characteristic for the

0V to 5V input range of the LTC1272. The code transitions

occur midway between successive integer LSB values

(i.e., 1/2LSB, 3/2LSBs, 5/2LSBs . . . FS – 3/2LSBs). The

output code is natural binary with 1 LSB = FS/4096 =

(5/4096)V = 1.22mV.

Unipolar Offset and Full-Scale Error Adjustment

In applications where absolute accuracy is important, then

offset and full-scale error can be adjusted to zero. Offset

0

00...000

00...001

00...010

00...011

11...110

11...111

1FS

LT1272 • TA11

23

11...101

LSB

LSBs

LSBs

FS – 1LSB

FS = 5V

1LSB =

FS

––––

4096

FULL-SCALE

TRANSITION

Figure 9. LTC1272 Ideal Input/Output Transfer Characteristic

error must be adjusted before full-scale error. Figure 10

shows the extra components required for full-scale error

adjustment. Zero offset is achieved by adjusting the offset

the op amp offset voltage until the ADC output code

flickers between 0000 0000 0000 and 0000 0000 0001.

For zero full-scale error apply an analog input of 4.99817V

R1 until the ADC output code flickers between 1111 1111

1110 and 1111 1111 1111.