HC210 datasheet(62/228 Pages) ALTERA

62 / 228 page

4–20

Altera Corporation

September 2008

HardCopy Series Handbook, Volume 1

Tables 4–30 and 4–31 define the specification for internal termination

specification when using series or differential on-chip termination.

Table 4–30. Series On-Chip Termination Specification for I/O Banks Supporting Memory Interface IOEs

Notes (1), (2), (3)

Symbol

Description

Conditions

Resistance Tolerance

Commercial

Max

Industrial

Max

Unit

Ω R

3.3/2.5

Internal series termination with

calibration (25-

Ω setting)

VCC IO = 3.3/2.5 V

±5

±10

Internal series termination

without calibration (25-

Ω setting)

VCC IO = 3.3/2.5 V

± 30

Ω R

3.3/2.5

Internal series termination with

calibration (50-

Ω setting)

VCC IO = 3.3/2.5 V

± 5

± 10

Internal series termination

without calibration (50-

Ω setting)

VCC IO = 3.3/2.5 V

± 30

Ω R

1.8

Internal series termination with

calibration (25-

Ω setting)

VCC IO = 1.8V

±5

±10

Internal series termination

without calibration (25-

Ω setting)

VCC IO = 1.8 V

± 30

Ω R

1.8

Internal series termination with

calibration (50-

Ω setting)

VCC IO = 1.8V

±5

±10

Internal series termination

without calibration (50-

Ω setting)

VCC IO = 1.8 V

± 30

Ω R

1.5

Internal series termination with

calibration (50-

Ω setting)

VCC IO = 1.5 V

±8

±10

Internal series termination

without calibration (50-

Ω setting)

VCC IO = 1.5 V

± 36

Notes to Table 4–30:

(1)

For information on which I/O banks support memory interface IOEs, refer to the Description, Architecture, and

Features chapter in the HardCopy II Device Family Data Sheet section in volume 1 of the HardCopy Series Handbook.

(2)

The resistance tolerances for calibrated SOCT and POCT are at the time of initial calibration. If the temperature or

voltage changes over time, the tolerance may also change.

(3)

This table applies only to HC210, HC220, HC230 and HC240 devices.

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