TMS77C82 datasheet(26/49 Pages) TI

26 / 49 page

TMS370Cx0x

8-BIT MICROCONTROLLER

SPNS029C – SEPTEMBER 1995 – REVISED FEBRUARY 1997

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

serial communications interface 1 (SCI1) module (continued)

D Data word format:

–

One start bit

–

Data word length programmable from one to eight bits

–

Optional even / odd / no parity bit

–

One or two stop bits

D Four error-detection flags: parity, overrun, framing, and break detection

D Two wake-up multiprocessor modes: Idle-line and address bit

D Half or full-duplex operation

D Double-buffered receiver and transmitter operations

D Transmitter and receiver operations can be accomplished through either interrupt-driven or

polled-algorithms with status flags:

–

Transmitter: TXRDY flag (transmitter buffer register is ready to receive another character) and TX

EMPTY flag (Transmitter shift register is empty)

–

Receiver: RXRDY flag (receive buffer register ready to receive another character), BRKDT flag (break

condition occurred), and RX ERROR monitoring four interrupt conditions

–

Separate enable bits for transmitter and receiver interrupts

–

NRZ (non return-to-zero) format

D Eleven SCI1 module control registers, located in control register frame beginning at address P050h

TMS77C82 Datasheet(PDF) 26 Page - Texas Instruments