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TMC22X5YA Datasheet(PDF) 4 Page - Cadeka Microcircuits LLC. |
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TMC22X5YA Datasheet(HTML) 4 Page - Cadeka Microcircuits LLC. |
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4 / 84 page ![]() TMC22x5yA PRODUCT SPECIFICATION 4 REV. 1.0.0 2/4/03 General Description The TMC22x5yA digital decoder can be used as a universal input to digital video processing systems by decoding digital composite video and transcoding digital component inputs into a common data format. The digital comb filter decoder implements one of sixteen comb filter architectures to produce luminance and color dif- ference component signals which are virtually free of the cross-color and cross-luminance artifacts associated with simple bandsplit filter decoders. Table 1. TMC22x5yA Decoder Family Because the cost/performance tradeoff varies among applica- tions, the TMC22x5yA decoder has been developed as a family of six parts. They are all assembled in the same package, and fit the same footprint. The register maps are identical. Figure 1. Logic Symbol The devices come in 8- and 10-bit resolution versions (see Figure 2 for data alignment between 8- and 10-bit versions). Within each resolution version there are three models, offer- ing three-line adaptive comb filtering, two-line adaptive comb filtering, and simple decoding. The TMC22153A 10-bit three-line comb filter can be programmed to emulate any of the other parts. All prototyping can be performed with this version to evaluate performance tradeoffs, and lower- cost versions are easily substituted in production. Input Processor The digitized video and clocks provided to the decoder can be either locked to the line frequency or the subcarrier fre- quency of the digitized waveform, providing broadcast qual- ity decoding from the NTSC square pixel rate of 12.27 MHz to the PAL four times subcarrier pixel rate of 17.73 MHz. Figure 2. Pixel Data Format Processors), TRS words (D1 multiplexed component sig- nals), and TRS-ID words (deserialized D2 signals) can be used to lock the internal horizontal and vertical state machines to the embedded information. If this information is not provided, external horizontal and vertical syncs are required for all line-locked input formats, and are optional for NTSC inputs locked to four times the subcarrier (4*Fsc). A simple sync separator is provided for digitized inputs locked to the subcarrier frequency: the internal sync separa- tor locks to the mid point of syncs during the vertical field group, then flywheels during the active portion of the field. For this reason, the DHSYNC and DVSYNC operations are not guaranteed in subcarrier mode. Adaptive Comb Filter The line based adaptive comb filter in the TMC22x5yA adds or subtracts the high frequency data from three adjacent field lines to produce the average of the high frequency luminance by canceling the chrominance signals, which in flat fields of color are 180 degrees apart. Unfortunately flat fields of color are rare and, when vertical transitions in the picture occur, the output of the comb filter contains a mixture of both high frequency luminance and chrominance, at which time the comb fails. To avoid the comb filter artifacts that occur when this happens, three sets of error signals are sent to a user-pro- grammable lookup table, allowing the output of the comb fil- ter to be mixed with the output of an internal bandsplit decoder. To produce these comb fail error signals, the video on each of the inputs to the comb filter is passed through a simple bandsplit decoder. The low-frequency portion of the signal is TMC2215yA TMC2205yA Function 321321 10-bit Data ✔✔✔ 8-bit Data ✔✔✔✔✔✔ D1 Interface ✔✔✔✔✔✔ Line-Locked Mode ✔✔✔✔✔✔ fSC-Locked Mode ✔✔✔✔✔✔ Genlock Mode ✔✔✔✔✔✔ NTSC Frame Comb ✔✔ NTSC/PAL Field Comb ✔✔ 3-Line Comb ✔✔ 2-Line Comb ✔✔ ✔✔ Line Grab ✔✔ ✔✔ Pixel Grab ✔✔✔✔✔✔ 65-22x5yA-02 VIDEOA9-0 BUFFER LDV HSYNC MASTER TMC22x5yA Multistandard Digital Video Decoder CLOCK CS VSYNC R/W D7-0 A1-0 VIDEOB9-0 G/Y9-0 B/CB9-0 R/CR9-0 FID2-0 AVOUT DHSYNC DVSYNC SER SET RESET SA2-0 SDA SCL MSB LSB VA9 VB9 G/Y9 B/CB9 R/CR9 VA8 VB8 G/Y8 B/CB8 R/CR8 ••• VA2 VB2 G/Y2 B/CB2 R/CR2 VA1 VB1 G/Y1 B/CB1 R/CR1 VA0 VB0 G/Y0 B/CB0 R/CR0 10 bit VA9 VB9 G/Y9 B/CB9 R/CR9 VA8 VB8 G/Y8 B/CB8 R/CR8 ••• VA2 VB2 G/Y2 B/CB2 R/CR2 N/C N/C N/C N/C N/C N/C N/C N/C N/C N/C 8 bit Inputs containing embedded GRS (CADEKA Video Input |
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