Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

ATXMEGA64A1 Datasheet(PDF) 13 Page - ATMEL Corporation

Part # ATXMEGA64A1
Description  8/16-bit XMEGA A1 Microcontroller
PDF  99 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATXMEGA64A1 Datasheet(HTML) 13 Page - ATMEL Corporation

Back Button ATXMEGA64A1 Datasheet HTML 9Page - ATMEL Corporation ATXMEGA64A1 Datasheet HTML 10Page - ATMEL Corporation ATXMEGA64A1 Datasheet HTML 11Page - ATMEL Corporation ATXMEGA64A1 Datasheet HTML 12Page - ATMEL Corporation ATXMEGA64A1 Datasheet HTML 13Page - ATMEL Corporation ATXMEGA64A1 Datasheet HTML 14Page - ATMEL Corporation ATXMEGA64A1 Datasheet HTML 15Page - ATMEL Corporation ATXMEGA64A1 Datasheet HTML 16Page - ATMEL Corporation ATXMEGA64A1 Datasheet HTML 17Page - ATMEL Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 13 / 99 page
background image
13
8067I–AVR–04/09
XMEGA A1
7.4.4
EBI - External Bus Interface
• Supports SRAM up to
– 512K Bytes using 2-port EBI
– 16M Bytes using 3-port EBI
• Supports SDRAM up to
– 128M bit using 3-port EBI
• Four software configurable Chip Selects
• Software configurable Wait State insertion
• Clocked from the Peripheral 2x Clock at up to two times the CPU clock speed
The External Bus Interface (EBI) is the interface for connecting external peripheral and memory
to the data memory space. The XMEGA A1 has 3 ports that can be used for the EBI. It can inter-
face external SRAM, SDRAM, and/or peripherals such as LCD displays and other memory
mapped devices.
The address space, and the number of pins used, for the external memory is selectable from
256 bytes (8-bit) and up to 16M bytes (24-bit). Various multiplexing modes for address and data
lines can be selected for optimal use of pins when more or less pins is available for the EBI.
Each of the four chip selects has seperate configuration, and can be configured for SRAM,
SRAM Low Pin Count (LPC) or SDRAM. The data memory address space associated for each
chip select is decided by a configurable base address and address size for each chip celect.
For SDRAM both 4-bit SDRAM is supported, and SDRAM configurations such as CAS Latency
and Refresh rate is configurable in software.
The EBI is clocked from the Peripheral 2x Clock, running up to two times faster than the CPU
and supporting speeds of up to 64 MHz.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com