HT45R35V datasheet(24/42 Pages) HOLTEK

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HT45R35V

Rev. 1.00

January 15, 2009

VFD Interface

A five line interface exists between the microcontroller

and the VFD driver as shown in the diagram.

Data transmission between the microcontroller and the

VFD interface is conducted via a three line interface us-

ing the CLK, DATA and STROBE lines. As data commu-

nication is only one way the microcontroller I/O pins

must bet setup as outputs.

The buzzer control input BZI will be transformed into a

complementary pair of outputs BZO and BZO by a con-

verter in the VFD driver. These complementary buzzer

outputs will also be level shifted to a higher voltage by

the converter. The VFD driver filament control input, F1,

will also be shifted to a high voltage output called F1O,

that can be used to switch the filaments on and off.

24-bit Shift Register/Latch

Data transmitted from the microcontroller is transmitted

serially and will be first written into a 24-bit shift register

located within the VFD driver. These 24-bits are used to

control the VFD panel segments, VFD0~VFD15, and

grid, VFD16~VFD23, lines. The control method is as fol-

lows:

· Use the

²DATA² and ²CLK² lines to shift data into the

internal 24-bit shift register. Data is clocked into the

shift-register on the positive clock edge. This data cor-

responds to the desired VFD0~VFD23 output display

data. The VFD outputs will only change if the

STROBE line is high. If the STROBE line is low, only

the shift register data will be modified and the VFD

outputs will remain the same.

· Use the

²STROBE² line to latch the shift-register data

to the VFD0~VFD23 outputs. When the STROBE line

is high, the shift register data will be latched to the

VFD lines. Note that the STROBE line is level and not

edge triggered.

The accompanying table shows the 24-bit shift regis-

ter/latch function truth table:

Clock

Strobe

Data

VFD0

VFDn

No change No change

VFDn-1

No change No change

Note:

²X² means don¢t care

²VFDn² means VFD1~VFD23

Programming Considerations

After power on all the I/O lines will be automatically

setup as inputs. However as lines PB3~PB7 are used to

drive the VFD and buzzer interface, they should be

setup as outputs after power is applied to the device. Al-

lowing the VFD interface control lines to be setup as in-

puts will create an incorrect VFD display and buzzer

operation. It is advised that the configuration options se-

lect pull-high resistors to be connected to these lines to

keep the lines at a fixed high level when power is initially

applied and until the lines can be setup as outputs.

S h i f t

R e g i s t e r

& L a t c h

C o m p l e m e n t

O u t p u t

C o n v e r t e r

L e v e l

S h i f t e r

V F D 0

V F D 2 3

F 1 O

P a d N a m e

V F D D r i v e r

P B 5

P B 6

P B 7

P B 3

P B 4

S T R O B E

C L K

D A T A

B Z I

F 1

B Z O

O u t p u t s

VFD Driver

C L K

D A T A

S T R O B E

V F D 0

VFD Display Control Timing Diagram

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