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AS3525 Datasheet(PDF) 117 Page - ams AG |
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AS3525 Datasheet(HTML) 117 Page - ams AG |
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117 / 194 page  AS3525-A/-B C22O22 Data Sheet, Confidential © 2005-2009, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved. www.austriamicrosystems.com Revision 1.13 117 - 194 7.3.15.4 Additional Chip Control Unit Registers Table 93 System Configuration Register Name Base Default CCU_SCON AS3525_CCU_BASE 0x00 System Configuration Register Offset: 0x0010h This read/write register controls system parameters. Bit Bit Name Default Access Bit Description 0 priority_config 0 R/W AHB master’s priority configuration: 0: Configuration A (default) Highest priority: TIC (Test Interface Controller) – for production test only 2nd highest priority: ARM922T 3rd highest priority: DMA 4th highest priority: USB lowest priority: IDE 1: Configuration B Highest priority: TIC (Test Interface Controller) – for production test only 2nd highest priority: DMA 3rd highest priority: USB 4th highest priority: IDE lowest priority: ARM922T Table 94 Chip Version Register Name Base Default CCU_VERS AS3525_CCU_BASE 0x09 Chip Version Register Offset: 0x0014h Version information can be read from this register. Bit Bit Name Default Access Bit Description 31:12 main_version_id(19 :0) 0x2 R main version ID 11:0 sub_version_id(11: 0) 0x1 R sub version ID Table 95 Spare Register 1 Name Base Default CCU_SPARE1 AS3525_CCU_BASE 0x00 Metal ECO Spare Register Offset: 0x0018h This register implements 32bit spare FF’s. Use for metal ECO redesign. Bit Bit Name Defau lt Access Bit Description 31:9 spare 0x00 R/W spare bits to be used for metal ECO redesign if SET 8 dma_sreq_SSPRX_off 0x00 R/W disableDMA single request of SSPRX module if SET 7 dma_sreq_SSPTX_off 0x00 R/W disable DMA single request of SSPTX module if SET 6 dma_sreq_DBOP_off 0x00 R/W disable DMA single request of DBOP module if SET 5 dma_sreq_I2Sin_off 0x00 R/W disable DMA single request of I2Sin module if SET 4 dma_sreq_I2Sout_off 0x00 R/W disable DMA single request of I2Sout module if SET 3:2 spare 0x00 R/W spare bits to be used for metal ECO redesign if SET 1:0 mpmc_clk_inv 0x00 R/W spare bits used to invert output clocks mpmc_clk(1:0) if SET |
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