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HMT112R7AFP8C Datasheet(PDF) 3 Page - Hynix Semiconductor |
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HMT112R7AFP8C Datasheet(HTML) 3 Page - Hynix Semiconductor |
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3 / 41 page ![]() Rev. 0.4 / Jul. 2009 3 Table of Contents 1. Description 1.1 Device Features and Ordering Information 1.1.1 Features 1.1.2 Ordering Information 1.2 Key Parameters 1.3 Speed Grade 1.4 Address Table 2. Pin Architecture 2.1 Pin Definition 2.2 Input/Output Functional Description 2.3 Pin Assignment 3. Functional Block Diagram 3.1 1GB, 128Mx72 Module(1Rank of x8) 3.2 2GB, 256Mx72 Module(2Rank of x8) 3.3 2GB, 256Mx72 Module(1Rank of x4) 3.4 4GB, 512Mx72 Module(2Rank of x4) 3.5 4GB, 512Mx72 Module(4Rank of x8) 3.6 8GB, 1Gx72 Module(4Rank of x4) 4. Environment Parameter 5. Input/Output Capacitance & AC Parametrics 6. IDD Specifications 7. DIMM Outline Diagram 7.1 1GB, 128Mx72 Module(1Rank of x8) 7.2 2GB, 256Mx72 Module(2Rank of x8) 7.3 2GB, 256Mx72 Module(1Rank of x4) 7.4 4GB, 512Mx72 Module(2Rank of x4) 7.5 4GB, 512Mx72 Module(4Rank of x8) 7.6 8GB, 1Gx72 Module(4Rank of x4) |
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