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SE97BTP Datasheet(PDF) 5 Page - NXP Semiconductors |
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SE97BTP Datasheet(HTML) 5 Page - NXP Semiconductors |
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5 / 53 page ![]() SE97B_1 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 01 — 27 January 2010 5 of 53 NXP Semiconductors SE97B DDR memory module temp sensor with integrated SPD 6. Pinning information 6.1 Pinning 6.2 Pin description Fig 2. Pin configuration for HWSON8 terminal 1 index area 1 A0 SE97BTP 002aae311 Transparent top view 2 A1 3 A2 4 8 7 6 5 VSS VDD EVENT SCL SDA Table 3. Pin description Symbol Pin Type Description A0 1 I I2C-bus/SMBus slave address bit 0 with internal pull-down. This input is overvoltage tolerant to support software write protection. A1 2 I I2C-bus/SMBus slave address bit 1 with internal pull-down A2 3 I I2C-bus/SMBus slave address bit 2 with internal pull-down VSS 4 ground device ground SDA 5 I/O SMBus/I2C-bus serial data input/output (open-drain). Must have external pull-up resistor. SCL 6 I SMBus/I2C-bus serial clock input/output (open-drain). Must have external pull-up resistor. EVENT 7 O Thermal alarm output for high/low and critical temperature limit (open-drain). Must have external pull-up resistor. VDD 8 power device power supply (3.0 V to 3.6 V) |
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