PCF2123TS datasheet(18/55 Pages) NXP

18 / 55 page

PCF2123_2

Product data sheet

Rev. 02 — 4 December 2009

18 of 55

NXP Semiconductors

PCF2123

SPI Real time clock/calendar

The registers at addresses 09h through 0Ch contain alarm information. When one or

more of these registers is loaded with minute, hour, day, or weekday, and its

corresponding Alarm Enable bit (AE_x) is logic 0, then that information is compared with

the current minute, hour, day, and weekday. When all enabled comparisons ﬁrst match,

the Alarm Flag (AF) is set logic 1.

The generation of interrupts from the alarm function is controlled via bit AIE (register

Control_2, see Table 6). If bit AIE is enabled, the INT pin follows the condition of bit AF. AF

will remain set until cleared by the interface. Once AF has been cleared, it will only be set

again when the time increments to match the alarm condition once more. Alarm registers

which have their AE_x bit logic 1 are ignored.

Generation of interrupts from the alarm function is described in Section 9.9.3.

(1) Only when all enabled alarm settings are matching.

It’s only on increment to a matched case that the alarm ﬂag is set, see Section 9.7.5.

Fig 13. Alarm function block diagram

Example where only the minute alarm is used and no other interrupts are enabled.

Fig 14. Alarm ﬂag timing

013aaa088

WEEKDAY ALARM

AE_W

WEEKDAY TIME

DAY ALARM

AE_D

DAY TIME

HOUR ALARM

AE_H

HOUR TIME

MINUTE ALARM

AE_M

MINUTE TIME

check now signal

set alarm flag AF (1)

AE_M = 1

example

001aaf903

minute alarm

minutes counter

INT when AIE = 1

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