PIC24F04KA201 datasheet(130/224 Pages) MICROCHIP

130 / 224 page

PIC24F04KA201 FAMILY

DS39937B-page 128

Preliminary

I2C1CON: I2C1 CONTROL REGISTER

R/W-0

U-0

R/W-0

R/W-1 HC

R/W-0

I2CEN

—

I2CSIDL

SCLREL

IPMIEN

A10M

DISSLW

SMEN

bit 15

bit 8

R/W-0

R/W-0, HC

GCEN

STREN

ACKDT

ACKEN

RCEN

PEN

RSEN

SEN

bit 7

bit 0

Legend:

HC = Hardware Clearable bit

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15

I2CEN:

I2C1 Enable bit

= Enables the I2C1 module and configures the SDA1 and SCL1 pins as serial port pins

= Disables the I2C1 module; all I2C™ pins are controlled by port functions

bit 14

Unimplemented:

Read as ‘0’

bit 13

I2CSIDL:

Stop in Idle Mode bit

= Discontinues module operation when device enters an Idle mode

= Continues module operation in Idle mode

bit 12

SCLREL:

SCL1 Release Control bit (when operating as I2C slave)

= Releases SCL1 clock

= Holds SCL1 clock low (clock stretch)

If STREN = 1:

Bit is R/W (i.e., software may write ‘0’ to initiate stretch and write ‘1’ to release clock). Hardware clear at

beginning of slave transmission. Hardware clear at end of slave reception.

If STREN = 0:

Bit is R/S (i.e., software may only write ‘1’ to release clock). Hardware clear at beginning of slave transmission.

bit 11

IPMIEN:

Intelligent Peripheral Management Interface (IPMI) Enable bit

= IPMI Support mode is enabled; all addresses Acknowledged

= IPMI Support mode is disabled

bit 10

A10M:

10-Bit Slave Addressing bit

= I2C1ADD is a 10-bit slave address

= I2C1ADD is a 7-bit slave address

bit 9

DISSLW:

Disable Slew Rate Control bit

= Slew rate control disabled

= Slew rate control enabled

bit 8

SMEN:

SMBus Input Levels bit

= Enables I/O pin thresholds compliant with the SMBus specification

= Disables the SMBus input thresholds

bit 7

GCEN:

General Call Enable bit (when operating as I2C slave)

= Enables interrupt when a general call address is received in the I2C1RSR (module is enabled for

reception)

= General call address disabled

bit 6

STREN:

SCL1 Clock Stretch Enable bit (when operating as I2C slave)

Used in conjunction with the SCLREL bit.

= Enables software or receive clock stretching

= Disables software or receive clock stretching

PIC24F04KA201 Datasheet(PDF) 130 Page - Microchip Technology

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